A simple function to add wavedrom diagrams into an ipython notebook.
☆24Jan 14, 2022Updated 4 years ago
Alternatives and similar repositories for nbwavedrom
Users that are interested in nbwavedrom are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Doppler effect on WaveForms☆17Sep 1, 2025Updated 6 months ago
- Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.☆13Sep 22, 2025Updated 6 months ago
- IP-XACT XML binding library☆16Jun 23, 2016Updated 9 years ago
- Generated files from ANTLR4 for Verilog parsing in Python☆12Jul 12, 2022Updated 3 years ago
- Initial 0.0.1 push☆13Jun 10, 2016Updated 9 years ago
- D3.js and ELK based schematic visualizer☆116Feb 27, 2024Updated 2 years ago
- Specification of the Wishbone SoC Interconnect Architecture☆52Jun 5, 2022Updated 3 years ago
- This repository provides the IEEE 1685 IP-XACT schema files for a Git submodule integration.☆20May 12, 2025Updated 10 months ago
- SystemVerilog wrapper over the Verilog Programming Interface (VPI)☆13Jun 3, 2025Updated 9 months ago
- Template based report generation for Pytest☆19Sep 27, 2024Updated last year
- A library and command-line tool for querying a Verilog netlist.☆29Jun 13, 2022Updated 3 years ago
- Python library for operations with VCD and other digital wave files☆55Nov 12, 2025Updated 4 months ago
- Python API to Unified Coverage Interoperability Standard (UCIS) Data☆31Mar 7, 2026Updated 2 weeks ago
- A Python to VHDL compiler☆17Apr 28, 2025Updated 10 months ago
- Hardware Design/Visualization/Simulation/RTLGeneration Framework☆16Mar 12, 2026Updated last week
- A tool for modeling FSMs by VHDL or Verilog☆12Updated this week
- A VHDL Core Library.☆18Mar 29, 2017Updated 8 years ago
- Useful set of library functions for VHDL☆47Nov 24, 2013Updated 12 years ago
- Python script to transform a VCD file to wavedrom format☆84Aug 18, 2022Updated 3 years ago
- This is the client side library to access JTAG Server distributed with Quartus (jtagd/jtagserver.exe). The protocol is known as Advanced …☆20Aug 18, 2025Updated 7 months ago
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++☆223Dec 23, 2025Updated 3 months ago
- sample VCD files☆43Feb 13, 2026Updated last month
- Xilinx Unisim Library in Verilog☆86Jul 22, 2020Updated 5 years ago
- Sphinx extension for visual documentation of hardware written in HWT☆11Nov 12, 2025Updated 4 months ago
- Functional Coverage and Constrained Randomization Extensions for Cocotb☆121Oct 3, 2025Updated 5 months ago
- cpp parser for reading a VCD (value change dump) file☆10Jul 15, 2013Updated 12 years ago
- A PCB front panel for Golioth's Aludel hardware platform☆17Jul 19, 2024Updated last year
- Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator☆41Nov 12, 2025Updated 4 months ago
- A simple Python utility for extracting documentation snippets from tutorials.☆14Aug 7, 2023Updated 2 years ago
- PCB layout for my cheap FPGA HDMI experimenting board☆10Aug 21, 2014Updated 11 years ago
- ☆18Jul 9, 2025Updated 8 months ago
- 🔁 elastic circuit toolchain☆33Dec 2, 2024Updated last year
- 🕒 Static Timing Analysis diagram renderer☆13Dec 13, 2023Updated 2 years ago
- Object Notation for Markup Language☆23Jan 6, 2023Updated 3 years ago
- Web-based HDL diagramming tool☆83May 1, 2023Updated 2 years ago
- Wishbone <-> AXI converters☆13Jun 1, 2015Updated 10 years ago
- Simple python library for generating your own perfetto traces for your application. Can be used for both app instrumentation and custom …☆25Jun 22, 2025Updated 9 months ago
- ☆22Mar 5, 2026Updated 2 weeks ago
- An implementation of WaveDrom which outputs TikZ for use in LaTeX documents.☆46Dec 5, 2021Updated 4 years ago