Hardware Design/Visualization/Simulation/RTLGeneration Framework
☆18Oct 8, 2026Updated 3 weeks ago
Alternatives and similar repositories for py4hw
Users that are interested in py4hw are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Reticle evaluation (PLDI 2021)☆12Apr 12, 2021Updated 5 years ago
- USB2 core for LiteX☆12Sep 30, 2026Updated last month
- Experimental USB2 HS/FS host primitives for FPGAs.☆12Updated this week
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated 2 years ago
- Izumi is an instruction pipeline visualizer for Onikiri2-Kanata format based on Konata.☆13Feb 6, 2026Updated 8 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆22Dec 20, 2019Updated 6 years ago
- Some assorted examples of nmigen designs☆19Nov 5, 2023Updated 2 years ago
- Design digital circuits in C. Simulate really fast with a regular compiler.☆186Jan 16, 2026Updated 9 months ago
- Experimental Lattice ECP5-driven Data Center Security Communication Module☆23Jul 22, 2024Updated 2 years ago
- CRUVI Standard Specifications☆21May 6, 2024Updated 2 years ago
- ☆22Mar 5, 2022Updated 4 years ago
- ☆16May 3, 2025Updated last year
- Artix7 SOM☆22Sep 9, 2024Updated 2 years ago
- Modular, flexible, cross-platform workload profiling and characterization☆13Mar 1, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 4 years ago
- Test of a RP2040 PMOD attached to a LiteX SoC.☆28May 16, 2023Updated 3 years ago
- Simulation of Interconnected Logical Inputs, Circuits, and Output Nodes☆18Updated this week
- micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop☆27Feb 25, 2025Updated last year
- HW Design: A Functional Approach☆146Jun 26, 2023Updated 3 years ago
- FastHOG library that has been fixed to work with CUDA 5.x on Ubuntu 12.04☆20Jan 23, 2014Updated 12 years ago
- CES VHDL utility library, with packages, memories, FIFOs, Clock Domain Crossing and more useful VHDL modules☆11Jan 17, 2022Updated 4 years ago
- Toy nmigen RISC V rv32i implementation☆23Oct 24, 2023Updated 3 years ago
- A general technique to reduce memory consumption and improve the performance of gap-affine and dual gap-affine sequence alignment algorit…☆17Jan 22, 2026Updated 9 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- ☆21Jun 12, 2024Updated 2 years ago
- ☆23Sep 18, 2026Updated last month
- high abstraction synthesis☆14Apr 8, 2024Updated 2 years ago
- Proposal to define an XML-based logging format for outputs from EDA tools and logging libraries.☆14Updated this week
- Simple python library for generating your own perfetto traces for your application. Can be used for both app instrumentation and custom …☆27Jun 22, 2025Updated last year
- Prototype plugin to support topic modeling using LDA in Elasticsearch☆20Mar 11, 2016Updated 10 years ago
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++☆226Oct 16, 2026Updated 2 weeks ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆24Updated this week
- The Qiskit Hackathon Barcelona is an immersive competition featuring live engagement, teamwork, and mentorship by expert researchers, dev…☆23Apr 10, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This repo is for Efinix Xyloni development board users. It has projects and software to get you started working with the board.☆49Jan 16, 2023Updated 3 years ago
- 2-layer and 4-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.☆30Mar 30, 2026Updated 7 months ago
- ☆11Aug 24, 2025Updated last year
- An embeddable FPGA SoM designed for high-speed audio and USB applications.☆39Updated this week
- Sechzig Compute Module☆11Sep 27, 2026Updated last month
- A C++ to Verilog translation tool with some basic guarantees that your code will work.☆182Jun 28, 2026Updated 4 months ago
- Z80 System on Chip☆13Jul 17, 2014Updated 12 years ago