antmicro / tuttestLinks
A simple Python utility for extracting documentation snippets from tutorials.
☆14Updated last year
Alternatives and similar repositories for tuttest
Users that are interested in tuttest are comparing it to the libraries listed below
Sorting:
- Sphinx Extension which generates various types of diagrams from Verilog code.☆61Updated last year
- Web-based HDL diagramming tool☆79Updated 2 years ago
- A sphinx extension that allows including wavedrom diagrams by using its text-based representation☆36Updated 10 months ago
- A simple function to add wavedrom diagrams into an ipython notebook.☆24Updated 3 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆29Updated 2 years ago
- Specification of the Wishbone SoC Interconnect Architecture☆45Updated 3 years ago
- End-to-End Open-Source I2C GPIO Expander☆32Updated 3 weeks ago
- An abstract language model of VHDL written in Python.☆54Updated 2 weeks ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆51Updated last year
- Learn, share and collaborate on ASIC design using open tools and technologies☆13Updated 4 years ago
- assorted library of utility cores for amaranth HDL☆93Updated 10 months ago
- System on Chip toolkit for nMigen☆19Updated 5 years ago
- IP-XACT XML binding library☆16Updated 9 years ago
- 🔍 Zoomable Waveform viewer for the Web☆43Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated 2 weeks ago
- System on Chip toolkit for Amaranth HDL☆92Updated 9 months ago
- Digital Circuit rendering engine☆39Updated 2 years ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆43Updated last month
- datasheet generator☆28Updated last month
- micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop☆15Updated 4 months ago
- A Sphinx domain providing VHDL language support.☆21Updated last year
- Virtual development board for HDL design☆42Updated 2 years ago
- A JSON library implemented in VHDL.☆79Updated 2 years ago
- Building and deploying container images for open source electronic design automation (EDA)☆115Updated 9 months ago
- Streaming based VHDL parser.☆84Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆22Updated 3 years ago
- an inverter drawn in magic with makefile to simulate☆26Updated 3 years ago
- Cross EDA Abstraction and Automation☆39Updated this week
- Generate symbols from HDL components/modules☆21Updated 2 years ago
- Public repository for PySysC, (From SC Common Practices Subgroup)☆52Updated last year