Alternatives and similar repositories for tuttest

Users that are interested in tuttest are comparing it to the libraries listed below

• witchard / nbwavedrom
  A simple function to add wavedrom diagrams into an ipython notebook.
  ☆24Updated 3 years ago
• davidthings / hdelk
  Web-based HDL diagramming tool
  ☆81Updated 2 years ago
• tudortimi / ipxact
  IP-XACT XML binding library
  ☆16Updated 9 years ago
• edaa-org / pyEDAA.IPXACT
  An IP-XACT DOM for IEEE 1685-2014 in Python.
  ☆31Updated last week
• VHDL / pyVHDLModel
  An abstract language model of VHDL written in Python.
  ☆58Updated 3 weeks ago
• dbhi / vboard
  Virtual development board for HDL design
  ☆42Updated 2 years ago
• bavovanachte / sphinx-wavedrom
  A sphinx extension that allows including wavedrom diagrams by using its text-based representation
  ☆38Updated last year
• Nic30 / hwtLib
  hardware library for hwt (= ipcore repo)
  ☆43Updated last month
• SymbiFlow / sphinxcontrib-hdl-diagrams
  Sphinx Extension which generates various types of diagrams from Verilog code.
  ☆63Updated 2 years ago
• 0x01be / rudder
  Learn, share and collaborate on ASIC design using open tools and technologies
  ☆14Updated 4 years ago
• fossi-foundation / wishbone
  Specification of the Wishbone SoC Interconnect Architecture
  ☆50Updated 3 years ago
• hdl / containers
  Building and deploying container images for open source electronic design automation (EDA)
  ☆115Updated last year
• m-labs / nmigen-soc
  System on Chip toolkit for nMigen
  ☆19Updated 5 years ago
• NJDFan / register-maps
  Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.
  ☆13Updated 2 months ago
• ydnatag / nmigen-cocotb
  cocotb extension for nMigen
  ☆17Updated 3 years ago
• fvutils / pyucis
  Python API to Unified Coverage Interoperability Standard (UCIS) Data
  ☆27Updated last month
• SystemRDL / PeakRDL-html
  Generate address space documentation HTML from compiled SystemRDL input
  ☆58Updated 3 weeks ago
• pybfms / pybfms
  Provides automation scripts for building BFMs
  ☆16Updated 7 months ago
• ghdl / docker
  Scripts to build and use docker images including GHDL
  ☆43Updated last year
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆52Updated 2 years ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆66Updated this week
• Paebbels / pyVHDLParser
  Streaming based VHDL parser.
  ☆84Updated last year
• taichi-ishitani / rggen
  This repository is no longer maintained. New repository is here(https://github.com/rggen/rggen).
  ☆17Updated 6 years ago
• edaa-org / pySVModel
  An abstract language model of SystemVerilog (incl. Verilog) written in Python.
  ☆10Updated last week
• HDLMake / hdl-make
  Tool for generating multi-purpose makefiles for FPGA projects (clone of hdlmake from CERN)
  ☆18Updated 4 years ago
• wavedrom / zoom
  🔍 Zoomable Waveform viewer for the Web
  ☆43Updated 5 years ago
• edaa-org / IPXACT-Schema
  This repository provides the IEEE 1685 IP-XACT schema files for a Git submodule integration.
  ☆20Updated 7 months ago
• wallento / wavedrompy
  WaveDrom compatible python command line
  ☆111Updated 2 years ago
• jameshanlon / netlist-paths
  A library and command-line tool for querying a Verilog netlist.
  ☆29Updated 3 years ago
• SystemRDL / PeakRDL-ipxact
  Import and export IP-XACT XML register models
  ☆36Updated last month