Alternatives and similar repositories for ESYSim

Users that are interested in ESYSim are comparing it to the libraries listed below

• zhaishaomin / ring_network-based-multicore-
  多核处理器 ;ring network , four core, shared space memory ,directory-based cache coherency
  ☆24Updated 8 years ago
• TYOD-SOC / RISCV-Accelerator
  ☆36Updated 6 years ago
• hyoukjun / OpenSMART
  Public release
  ☆51Updated 5 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆50Updated 7 years ago
• amonemi / ProNoC
  Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).
  ☆56Updated this week
• ljgibbslf / basic_cache_core
  ☆28Updated 4 years ago
• ucb-ucie / uciedigital
  Pure digital components of a UCIe controller
  ☆63Updated this week
• Davxx / gem5_Garnet2.0_extensions
  Fork of the gem5 simulator with Garnet2.0 and DSENT extensions
  ☆11Updated 6 years ago
• ansonn / esl_systemc
  systemc建模相关
  ☆27Updated 10 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago
• matutani / nocgen
  NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers
  ☆63Updated 5 years ago
• ananthbhat94 / DDR4MemoryController
  HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
  ☆74Updated 7 years ago
• pulp-platform / fpu
  ☆50Updated 6 years ago
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆75Updated 10 years ago
• rgb000000 / eyeriss-chisel3
  eyeriss-chisel3
  ☆40Updated 3 years ago
• chenhaoc / ESL_Learning
  some knowleage about SystemC/TLM etc.
  ☆24Updated 2 years ago
• kuladeepsaireddy / OpenNoc
  ☆33Updated 6 years ago
• ehao222 / ASIC-design-example-RISC-CPU
  Base on Synopsys platform using VCS,DC,ICC,PT.
  ☆11Updated 4 years ago
• abdelrhman-oun / DDR5_PHY_WriteOperation
  ☆52Updated 2 years ago
• bakhshalipour / NoC-Verilog
  A verilog implementation for Network-on-Chip
  ☆73Updated 7 years ago
• chenhaoc / cnnhwpe
  ☆66Updated 3 years ago
• lizhirui / DreamCoreV2
  ☆22Updated 2 years ago
• booksim / booksim
  BookSim 1.0
  ☆22Updated 11 years ago
• chipsalliance / aib-protocols
  ☆26Updated last year
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆46Updated 2 months ago
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆34Updated 4 years ago
• pulp-platform / axi-io-pmp
  Input / Output Physical Memory Protection Unit for RISC-V
  ☆12Updated last year
• emwzq / example_uvm
  UVM实战随书源码
  ☆51Updated 6 years ago
• SingularityKChen / SystemC-Training
  SystemC training aimed at TLM.
  ☆29Updated 4 years ago
• yaozhaosh / e200_opensource
  The Ultra-Low Power RISC Core
  ☆15Updated 5 years ago