vmunoz82 / sudoku-challengeLinks
Solving Sudokus using open source formal verification tools
☆18Updated 3 years ago
Alternatives and similar repositories for sudoku-challenge
Users that are interested in sudoku-challenge are comparing it to the libraries listed below
Sorting:
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆108Updated last week
- Wishbone interconnect utilities☆43Updated 9 months ago
- Plugins for Yosys developed as part of the F4PGA project.☆83Updated last year
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆57Updated last week
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆21Updated 2 years ago
- End-to-End Open-Source I2C GPIO Expander☆33Updated last week
- A current mode buck converter on the SKY130 PDK☆34Updated 4 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated this week
- Small SERV-based SoC primarily for OpenMPW tapeout☆48Updated 5 months ago
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆62Updated 4 years ago
- LunaPnR is a place and router for integrated circuits☆47Updated 4 months ago
- cryptography ip-cores in vhdl / verilog☆41Updated 4 years ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆18Updated 7 months ago
- Bitstream relocation and manipulation tool.☆49Updated 2 years ago
- ☆38Updated 2 years ago
- ☆33Updated 2 years ago
- Trying to verify Verilog/VHDL designs with formal methods and tools☆42Updated last year
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆119Updated 2 years ago
- Flip flop setup, hold & metastability explorer tool☆51Updated 3 years ago
- Framework Open EDA Gui☆73Updated 11 months ago
- Example of how to use UVM with Verilator☆27Updated 3 weeks ago
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆61Updated 2 months ago
- Open source ISS and logic RISC-V 32 bit project☆61Updated 2 weeks ago
- SVA examples and demonstration☆17Updated 5 years ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆81Updated last month
- A padring generator for ASICs☆25Updated 2 years ago
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆28Updated 10 months ago
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆91Updated 6 years ago
- SAR ADC on tiny tapeout☆43Updated 9 months ago