Alternatives and similar repositories for altera-pcie

Users that are interested in altera-pcie are comparing it to the libraries listed below

• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆66Updated 2 months ago
• litex-hub / litespi
  Small footprint and configurable SPI core
  ☆46Updated 3 weeks ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆100Updated 6 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆50Updated 2 months ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆53Updated 2 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆38Updated 2 years ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆69Updated 3 weeks ago
• westonb / artix7-PCIe
  artix-7 PCIe dev board
  ☆31Updated 8 years ago
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆85Updated last year
• ultraembedded / core_ft60x_axi
  FTDI FT600 SuperSpeed USB3.0 to AXI bus master
  ☆97Updated 5 years ago
• quartiq / bscan_spi_bitstreams
  FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
  ☆57Updated 2 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆48Updated 5 years ago
• texane / vpcie
  implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture
  ☆108Updated 7 years ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆97Updated 5 years ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆102Updated 2 weeks ago
• f4pga / prjuray
  Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
  ☆81Updated 3 years ago
• enjoy-digital / pcie_analyzer
  PCIe analyzer experiments
  ☆63Updated 5 years ago
• blackmesalabs / MesaBusProtocol
  Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
  ☆35Updated last year
• ECP5-PCIe / ECP5-PCIe
  Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
  ☆102Updated 2 years ago
• cliffordwolf / PonyLink
  A single-wire bi-directional chip-to-chip interface for FPGAs
  ☆125Updated 9 years ago
• vfinotti / cortex-m0-soft-microcontroller
  Soft-microcontroller implementation of an ARM Cortex-M0
  ☆26Updated 6 years ago
• enjoy-digital / litesata
  Small footprint and configurable SATA core
  ☆156Updated 2 months ago
• im-tomu / valentyusb
  FPGA USB stack written in LiteX
  ☆132Updated 3 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆55Updated 9 months ago
• RISCV-on-Microsemi-FPGA / SoftConsole
  Eclipse based IDE for RISC-V bare metal software development.
  ☆20Updated 6 years ago
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 6 years ago
• SMB784 / SQRL_quickstart
  Basic loadout for SQRL Acorn CLE 215/215+ board. Blinks all LEDs, outputs square waves on all 12 GPIO outputs
  ☆69Updated 4 years ago
• ZipCPU / wbi2c
  Wishbone controlled I2C controllers
  ☆56Updated last year
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆151Updated 3 weeks ago