Alternatives and similar repositories for FPGADesignElements

Users that are interested in FPGADesignElements are comparing it to the libraries listed below

• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆593Updated 6 months ago
• enjoy-digital / litedram
  Small footprint and configurable DRAM core
  ☆444Updated last week
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆403Updated last week
• chipsalliance / f4pga-examples
  Example designs showing different ways to use F4PGA toolchains.
  ☆276Updated last year
• skordal / potato
  A simple RISC-V processor for use in FPGA designs.
  ☆279Updated last year
• JulianKemmerer / PipelineC
  A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …
  ☆679Updated last week
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆311Updated last year
• olofk / edalize
  An abstraction library for interfacing EDA tools
  ☆716Updated last week
• zachjs / sv2v
  SystemVerilog to Verilog conversion
  ☆670Updated 4 months ago
• hamsternz / DisplayPort_Verilog
  A Verilog implementation of DisplayPort protocol for FPGAs
  ☆259Updated 6 years ago
• projf / display_controller
  FPGA display controller with support for VGA, DVI, and HDMI.
  ☆241Updated 5 years ago
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆389Updated 4 months ago
• bespoke-silicon-group / basejump_stl
  BaseJump STL: A Standard Template Library for SystemVerilog
  ☆612Updated 2 weeks ago
• os-fpga / open-source-fpga-resource
  A list of resources related to the open-source FPGA projects
  ☆424Updated 2 years ago
• fabriziotappero / ip-cores
  A huge collection of VHDL/Verilog open-source IP cores scraped from the web
  ☆527Updated 2 years ago
• VLSI-EDA / PoC
  The PoC Library has been forked to github.com/VHDL/PoC. See new address below
  ☆596Updated 2 months ago
• UVVM / UVVM
  UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …
  ☆409Updated 3 weeks ago
• litex-hub / linux-on-litex-vexriscv
  Linux on LiteX-VexRiscv
  ☆665Updated last month
• f4pga / f4pga-arch-defs
  FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
  ☆295Updated last week
• fusesoc / blinky
  Example LED blinking project for your FPGA dev board of choice
  ☆185Updated last week
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆525Updated 4 years ago
• chipsalliance / VeeRwolf
  FuseSoC-based SoC for VeeR EH1 and EL2
  ☆328Updated 10 months ago
• ultraembedded / FPGAmp
  720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)
  ☆284Updated 4 years ago
• enjoy-digital / litepcie
  Small footprint and configurable PCIe core
  ☆593Updated last week
• lowRISC / style-guides
  lowRISC Style Guides
  ☆461Updated 4 months ago
• litex-hub / litex-boards
  LiteX boards files
  ☆440Updated last week
• stffrdhrn / sdram-controller
  Verilog SDRAM memory controller
  ☆348Updated 8 years ago
• mattvenn / awesome-opensource-asic-resources
  ☆352Updated 2 years ago
• pulp-platform / common_cells
  Common SystemVerilog components
  ☆665Updated 3 weeks ago
• YosysHQ / fpga-toolchain
  Multi-platform nightly builds of open source FPGA tools
  ☆299Updated 3 years ago