laforest / FPGADesignElementsLinks
A self-contained online book containing a library of FPGA design modules and related coding/design guides.
☆432Updated 8 months ago
Alternatives and similar repositories for FPGADesignElements
Users that are interested in FPGADesignElements are comparing it to the libraries listed below
Sorting:
- SystemVerilog to Verilog conversion☆630Updated 2 weeks ago
- An abstraction library for interfacing EDA tools☆690Updated 3 weeks ago
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆653Updated this week
- Opensource DDR3 Controller☆333Updated this week
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆641Updated 4 months ago
- Bus bridges and other odds and ends☆560Updated last month
- A DDR3 memory controller in Verilog for various FPGAs☆461Updated 3 years ago
- Common SystemVerilog components☆623Updated this week
- A huge VHDL library for FPGA and digital ASIC development☆384Updated this week
- Small footprint and configurable DRAM core☆414Updated last week
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆497Updated 3 months ago
- A simple, basic, formally verified UART controller☆303Updated last year
- FOSS Flow For FPGA☆388Updated 4 months ago
- BaseJump STL: A Standard Template Library for SystemVerilog☆575Updated 2 weeks ago
- Example designs showing different ways to use F4PGA toolchains.☆276Updated last year
- A simple RISC-V processor for use in FPGA designs.☆274Updated 9 months ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆288Updated last week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,293Updated this week
- Various HDL (Verilog) IP Cores☆798Updated 3 years ago
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆393Updated this week
- Small footprint and configurable PCIe core☆549Updated last week
- This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…☆426Updated 2 weeks ago
- A Linux-capable RISC-V multicore for and by the world☆701Updated last month
- IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Techn…☆579Updated 4 years ago
- A List of Free and Open Source Hardware Verification Tools and Frameworks☆525Updated last year
- An open-source static random access memory (SRAM) compiler.☆906Updated 2 months ago
- Verilog SDRAM memory controller☆332Updated 8 years ago
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆455Updated 2 weeks ago
- A list of resources related to the open-source FPGA projects☆409Updated 2 years ago
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆399Updated 3 weeks ago