laforest / FPGADesignElementsLinks
A self-contained online book containing a library of FPGA design modules and related coding/design guides.
☆435Updated 9 months ago
Alternatives and similar repositories for FPGADesignElements
Users that are interested in FPGADesignElements are comparing it to the libraries listed below
Sorting:
- Bus bridges and other odds and ends☆568Updated 2 months ago
- SystemVerilog to Verilog conversion☆639Updated last month
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆642Updated 5 months ago
- A huge VHDL library for FPGA and digital ASIC development☆390Updated this week
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆659Updated this week
- Common SystemVerilog components☆627Updated this week
- A DDR3 memory controller in Verilog for various FPGAs☆475Updated 3 years ago
- Small footprint and configurable DRAM core☆418Updated 3 weeks ago
- An abstraction library for interfacing EDA tools☆696Updated this week
- A simple, basic, formally verified UART controller☆304Updated last year
- Opensource DDR3 Controller☆344Updated last week
- A List of Free and Open Source Hardware Verification Tools and Frameworks☆533Updated last year
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆504Updated 4 months ago
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆399Updated last month
- IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Techn…☆580Updated 4 years ago
- Open Logic FPGA Standard Library☆636Updated this week
- A simple RISC-V processor for use in FPGA designs.☆275Updated 10 months ago
- 720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)☆279Updated 4 years ago
- BaseJump STL: A Standard Template Library for SystemVerilog☆581Updated last week
- lowRISC Style Guides☆436Updated last week
- Multi-platform nightly builds of open source FPGA tools☆296Updated 3 years ago
- A list of resources related to the open-source FPGA projects☆413Updated 2 years ago
- This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…☆426Updated last month
- VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!☆625Updated 2 months ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,300Updated 2 weeks ago
- The UVM written in Python☆434Updated 2 months ago
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆395Updated this week
- Various HDL (Verilog) IP Cores☆813Updated 3 years ago
- Example LED blinking project for your FPGA dev board of choice☆177Updated 3 weeks ago
- FuseSoC-based SoC for VeeR EH1 and EL2☆320Updated 6 months ago