Domipheus / ArtyS7
Where Arty S7 projects are kept. MIT License unless file headers state otherwise.
☆22Updated 5 years ago
Alternatives and similar repositories for ArtyS7:
Users that are interested in ArtyS7 are comparing it to the libraries listed below
- DVI PMOD adapter (HDMI connector)☆28Updated 4 years ago
- DVI video out example for prjtrellis☆16Updated 6 years ago
- crap-o-scope scope implementation for icestick☆20Updated 6 years ago
- IceCore Ice40 HX based modular core☆46Updated 4 years ago
- VGA-compatible text mode functionality☆16Updated 4 years ago
- Test of ICEstick PLL usage with Yosys/Arachne-PNR/Icetools☆21Updated 8 years ago
- Miscellaneous ULX3S examples (advanced)☆75Updated last month
- A PicoRV32 SoC for the TinyFPGA BX with peripherals designed for building games☆22Updated 6 years ago
- Microprogrammed 65C02-compatible FPGA Processor Core (Verilog-2001)☆53Updated 8 years ago
- UPduino☆26Updated 4 years ago
- A simple script to build open-source FPGA tools.☆15Updated 4 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆37Updated 2 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆35Updated last year
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆84Updated 6 years ago
- ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)☆22Updated 3 months ago
- Example designs for the Spartan7 "S7 Mini" FPGA board☆28Updated 5 years ago
- Collection of PMOD boards for the use with iCEBreaker and any other FPGA board that has PMOD connectors.☆91Updated 10 months ago
- Using the TinyFPGA BX USB code in user designs☆49Updated 6 years ago
- Tools for FPGA development.☆44Updated last year
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14Updated 4 years ago
- Efficient implementations of the transcendental functions☆27Updated 8 years ago
- mystorm sram test☆27Updated 7 years ago
- ☆10Updated 6 years ago
- Retro computing on the Ulx3s ECP5 FPGA board☆24Updated 2 years ago
- Quickstart binaries for flashing ULX3S to factory-default state☆25Updated 2 years ago
- Simplified environment for litex☆14Updated 4 years ago
- Yosys Plugins☆21Updated 5 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Updated 5 years ago
- Cross compile FPGA tools☆22Updated 4 years ago