upstream: https://github.com/RALC88/gem5
☆34May 30, 2023Updated 3 years ago
Alternatives and similar repositories for plct-gem5
Users that are interested in plct-gem5 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆11Apr 13, 2026Updated 5 months ago
- PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases☆21Nov 26, 2020Updated 5 years ago
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆19Aug 21, 2021Updated 5 years ago
- FIPS 202 compliant SHA-3 core in Verilog☆26Oct 8, 2020Updated 5 years ago
- ☆381Aug 26, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- RISC-V Vectorized Bencmark Suite. based on https://github.com/RALC88/riscv-vectorized-benchmark-suite☆12Oct 28, 2022Updated 3 years ago
- RiVEC Bencmark Suite☆133Nov 27, 2024Updated last year
- This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…☆23Mar 10, 2026Updated 6 months ago
- Formal verification tools for Chisel and RISC-V☆15Mar 29, 2026Updated 5 months ago
- Chisel RISC-V Vector 1.0 Implementation☆158Sep 3, 2026Updated 2 weeks ago
- 我的一生一芯项目☆16Dec 14, 2021Updated 4 years ago
- Open-Source EDA workshop for RISC-V community☆12Jul 27, 2022Updated 4 years ago
- ☆324Jul 22, 2026Updated 2 months ago
- A Rocket-based RISC-V superscalar in-order core☆42Aug 31, 2026Updated 3 weeks ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- XiangShan Frontend Develop Environment☆73Updated this week
- Original test vector of RISC-V Vector Extension☆14Mar 23, 2021Updated 5 years ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆23Nov 24, 2025Updated 9 months ago
- A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code☆154Aug 14, 2026Updated last month
- ☆15Apr 28, 2026Updated 4 months ago
- Unit tests generator for RVV 1.0☆118May 25, 2026Updated 3 months ago
- A library for lattice-based homomorphic encryption in Go☆14May 15, 2022Updated 4 years ago
- Instruction Set Generator initially contributed by Futurewei☆316Oct 17, 2023Updated 2 years ago
- ☆10Dec 28, 2020Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- CV32E40X Design-Verification environment☆19Jun 2, 2026Updated 3 months ago
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆20Aug 15, 2026Updated last month
- Examine and discover LoongArch instructions☆25Sep 5, 2026Updated 2 weeks ago
- RTL blocks compatible with the Rocket Chip Generator☆17Mar 30, 2025Updated last year
- RISC-V Summit China 2023☆40Sep 27, 2023Updated 2 years ago
- Unlimited Vector Extension with Data Streaming Support☆12Nov 25, 2024Updated last year
- Spike with a coherence supported cache model☆14Jul 9, 2024Updated 2 years ago
- Chisel3 AXI4-{Lite, Full, Stream} Definitions☆15Dec 31, 2018Updated 7 years ago
- RISCV C and Triton AI-Benchmark☆26Jan 28, 2026Updated 7 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- GNU GRUB https://git.savannah.gnu.org/git/grub.git☆15Aug 2, 2023Updated 3 years ago
- ☆19Mar 8, 2025Updated last year
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆56Feb 6, 2020Updated 6 years ago
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆547Aug 19, 2026Updated last month
- Light weight threading library for gem5 syscall emulator (git mirror)☆16Mar 1, 2017Updated 9 years ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆166Jan 25, 2024Updated 2 years ago
- Project where we conceptualized and designed a simple neural network accelerator, loosely based on the Eyeriss architecture, to accelerat…☆11Dec 13, 2019Updated 6 years ago