This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usages associated with profiling and debug.
☆23Mar 10, 2026Updated 3 months ago
Alternatives and similar repositories for riscv-control-transfer-records
Users that are interested in riscv-control-transfer-records are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- RV32I by cats☆15Sep 4, 2023Updated 2 years ago
- A 3d printed case design for Lichee Pi 4A☆11May 13, 2023Updated 3 years ago
- Vijos: Vijos Isn't Just an Operating System☆10May 31, 2020Updated 6 years ago
- My RV64 CPU (Work in progress)☆19Dec 22, 2022Updated 3 years ago
- CIDR union / subtraction☆14Updated this week
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- User-mode trap-and-emulate hypervisor for RISC-V☆14Feb 11, 2022Updated 4 years ago
- [No longer active] A fork of OpenSBI, with software-emulated hypervisor extension support☆43Aug 15, 2025Updated 10 months ago
- A Rocket-Chip with a Dynamically Randomized LLC☆14Sep 18, 2024Updated last year
- My DAC '21 work open-sourced.☆14Feb 25, 2021Updated 5 years ago
- Proof-of-concept for I See Dead Micro-Ops transient execution attack☆15Nov 3, 2021Updated 4 years ago
- This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. …☆95May 25, 2026Updated 3 weeks ago
- PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases☆21Nov 26, 2020Updated 5 years ago
- ☆38Aug 6, 2022Updated 3 years ago
- (WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog☆12Sep 9, 2021Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Plagiarism detection tool in Rust (inspired by Stanford Moss)☆54Sep 12, 2025Updated 9 months ago
- Spike with a coherence supported cache model☆14Jul 9, 2024Updated last year
- Implements kernels with RISC-V Vector☆22Mar 24, 2023Updated 3 years ago
- Port of original MemTest86+ v5.1 to other architectures (RISC-V for now)☆16Jan 26, 2020Updated 6 years ago
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆62Feb 17, 2022Updated 4 years ago
- 网络学堂 PC 端 App☆21May 28, 2026Updated 3 weeks ago
- CoreMark 1.0 ported to WebAssembly☆45Apr 2, 2021Updated 5 years ago
- A Modified gem5 for Simulating Virtualized Systems☆11Mar 1, 2015Updated 11 years ago
- RustSBI support on SiFive FU740 board; FU740 is a five-core heterogeneous processor with four SiFive U74 cores, and one SiFive S7 core☆17Jul 20, 2023Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆17Nov 24, 2020Updated 5 years ago
- ☆23Nov 12, 2020Updated 5 years ago
- Open-Source EDA workshop for RISC-V community☆12Jul 27, 2022Updated 3 years ago
- A simple program to make your Linux server act as TCP Transparent Proxy.☆25Mar 7, 2020Updated 6 years ago
- A hardware accelerated IP packet forwarder running on programmable ICs☆15Jan 21, 2023Updated 3 years ago
- ☆13May 17, 2016Updated 10 years ago
- A standalone parser for BSV (Bluespec SystemVerilog) written in Go☆14Dec 20, 2016Updated 9 years ago
- A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.☆30May 14, 2020Updated 6 years ago
- Sail RISC-V model☆720Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Securing Embedded Systems with Return Address Integrity☆16Aug 19, 2024Updated last year
- Unit tests generator for RVV 1.0☆113May 25, 2026Updated 3 weeks ago
- Troff/Groff Resources.☆21Sep 10, 2025Updated 9 months ago
- SpV8 is a SpMV kernel written in AVX-512. Artifact for our SpV8 paper @ DAC '21.☆29Mar 16, 2021Updated 5 years ago
- build mainline SBI and Linux for allwinner D1 nezha board☆11Jun 30, 2021Updated 4 years ago
- upstream: https://github.com/RALC88/gem5☆33May 30, 2023Updated 3 years ago
- Paging Debug tool for GDB using python☆13Jun 4, 2022Updated 4 years ago