Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020
☆27Apr 11, 2022Updated 4 years ago
Alternatives and similar repositories for fasthash
Users that are interested in fasthash are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simple hash table on Verilog (SystemVerilog)☆52Apr 3, 2016Updated 10 years ago
- Support for automatic address map generation and address decoding logic for Wishbone connected hierachical systems☆12Mar 12, 2026Updated last month
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆11Dec 16, 2021Updated 4 years ago
- Demonstrating the usage of FGYM: A Toolkit for benchmarking FPGA-accelerated Reinforcement Learning☆13Aug 12, 2021Updated 4 years ago
- understanding of cocotb （In Chinese Only）☆22Jun 10, 2025Updated 10 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- HLS implementation of cuckoo hashing. Refer to paper : https://ieeexplore.ieee.org/document/7577355/☆14Dec 4, 2018Updated 7 years ago
- Hardware Assisted IEEE 1588 IP Core☆30Jul 17, 2014Updated 11 years ago
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 3 years ago
- VCD file viewer for Neovim☆15Feb 20, 2022Updated 4 years ago
- Skid Buffer and Pipeline Skid Buffer designed in Verilog/System Verilog.☆32Nov 3, 2025Updated 6 months ago
- Various Notes and Tutorials☆35Sep 9, 2024Updated last year
- Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis☆18Feb 16, 2024Updated 2 years ago
- Hands-on experience programming AI Engines using Vitis Unified Software Platform☆40Jul 24, 2024Updated last year
- PNG encoder, implemented in VHDL☆23Mar 30, 2024Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- An example model of a Network Processing Unit using the PFPSim framework.☆13Aug 23, 2016Updated 9 years ago
- FPGA Low latency 10GBASE-R PCS☆13May 23, 2023Updated 2 years ago
- A high-throughput VHDL and SystemVerilog implementation of AES-128 including scripts for a full front-end design process.☆42Nov 17, 2014Updated 11 years ago
- A simple AXI4 DMA unit written in SpinalHDL.☆18Apr 18, 2020Updated 6 years ago
- ChipScope / ILA using XVC (XIlinx Virtual Cable Over PCIe) with a PR (Partial Reconfiguration) design Example.☆14Jun 1, 2017Updated 8 years ago
- Verilog Content Addressable Memory Module☆117Mar 2, 2022Updated 4 years ago
- Chisel NVMe controller☆27Nov 24, 2022Updated 3 years ago
- Arrow Matrix Decomposition - Communication-Efficient Distributed Sparse Matrix Multiplication☆15Mar 25, 2024Updated 2 years ago
- ☆37Apr 10, 2026Updated 3 weeks ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Repo to help explain the different options users have for packaging.☆19Jun 8, 2022Updated 3 years ago
- RTL implementation of TFlite FPGA accelerator and RISC-V controller. 3D Object Detection based on LiDAR Point Clouds.☆16Mar 12, 2023Updated 3 years ago
- ☆14Mar 7, 2022Updated 4 years ago
- NeuraChip Accelerator Simulator☆16Apr 26, 2024Updated 2 years ago
- ☆19Updated this week
- ☆33Apr 30, 2023Updated 3 years ago
- 在FPGA上实现SRIO收发控制器☆11Sep 30, 2022Updated 3 years ago
- An infrastructure for inline acceleration of network applications☆30Oct 25, 2021Updated 4 years ago
- Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"☆16Aug 29, 2021Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A mesh to pointcloud converter with FPS algorithm and HDF5 output generator☆11Mar 25, 2023Updated 3 years ago
- Modular SRAM-based 2D hierarchical-search Binary Content Addressable Memory (2D-BCAM)☆22Nov 10, 2024Updated last year
- ☆52Mar 19, 2026Updated last month
- Research paper list for host networking: in a system view☆10Jan 2, 2025Updated last year
- 2021 Xilinx China Winter Camp☆11Mar 12, 2021Updated 5 years ago
- Verilog hardware abstraction library☆50Apr 23, 2026Updated last week
- VHDL related news.☆27Updated this week