understanding of cocotb (In Chinese Only)
☆22Jun 10, 2025Updated last year
Alternatives and similar repositories for cocotb_primer
Users that are interested in cocotb_primer are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆29Dec 15, 2025Updated 6 months ago
- Ready-to-link, packaged Aurora IP on four QSFP28 lanes, providing 100Gb/s throughput, flow control and status monitoring☆17Apr 26, 2026Updated last month
- UART cocotb module☆11Jun 30, 2021Updated 4 years ago
- Radio Spectrum Viewer and Software Defined Radio in a cheap FPGA board☆21Apr 24, 2023Updated 3 years ago
- ☆21Mar 18, 2022Updated 4 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- AXI interface modules for Cocotb☆333Mar 13, 2026Updated 3 months ago
- I2C models for cocotb☆45Mar 18, 2026Updated 2 months ago
- Example designs for FPGA Drive FMC☆292Updated this week
- vRTLmod modifies Verilator generated RTL simulation code for faul-injection purposes. It transforms source code with the help of LLVM/C…☆20Mar 28, 2026Updated 2 months ago
- Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, …☆18May 31, 2026Updated 2 weeks ago
- UART models for cocotb☆34Sep 7, 2025Updated 9 months ago
- 在FPGA上实现SRIO收发控制器☆11Sep 30, 2022Updated 3 years ago
- Bitmap Processing Library & AXI-Stream Video Image VIP☆37Apr 11, 2022Updated 4 years ago
- RFSoC2x2 board repo for PYNQ☆17Oct 11, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Complete tutorial code.☆23Apr 29, 2024Updated 2 years ago
- Audio filtering with pyfda and cocotb☆12Sep 24, 2020Updated 5 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆41Feb 24, 2025Updated last year
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 9 years ago
- A Programmable Hardware Architecture for Network Transport Logic☆37Oct 26, 2021Updated 4 years ago
- Sources and instructions for building an Intel(r) Edison-based monitoring system witih motion detection and cloud/social connection☆20Aug 20, 2017Updated 8 years ago
- Saturn SDR Radio: Xilinx FPGA and Raspberry Pi 4 CM☆49Apr 29, 2026Updated last month
- Implementation of Input Stationary, Weight Stationary and Output Stationary dataflow for given neural network on a tiled architecture☆10Apr 19, 2020Updated 6 years ago
- Official repo of LookWhere (NeurIPS 2025) for efficient high-res visual recognition☆16Oct 23, 2025Updated 7 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- c++ version of ViT☆12Nov 13, 2022Updated 3 years ago
- ☆12Jun 4, 2024Updated 2 years ago
- RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.☆170Mar 20, 2025Updated last year
- Gaia DR3 has 6.6M quasar candidates! We construct a new quasar catalog for cosmology with them.☆10May 31, 2026Updated 2 weeks ago
- ☆14Jun 22, 2022Updated 3 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆152Jun 14, 2024Updated 2 years ago
- Home page for Microsoft Phi-Ground tech-report☆23Sep 8, 2025Updated 9 months ago
- Implemented The UART with FIFO☆15Jul 4, 2019Updated 6 years ago
- ☆20Nov 7, 2019Updated 6 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- An ASCII Header Generator for Network Protocols☆14Dec 12, 2024Updated last year
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Apr 11, 2023Updated 3 years ago
- Automatic Verilog/SystemVerilog verification platform generation, support for one-click simulation☆12Aug 8, 2019Updated 6 years ago
- ☆14May 15, 2023Updated 3 years ago
- FITS to Azimuth/Elevation using Astrometry.net--calibrate and plate scale images☆12Feb 6, 2024Updated 2 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆70Jan 8, 2024Updated 2 years ago
- Official implementation of the ICLR'25 paper "QERA: an Analytical Framework for Quantization Error Reconstruction".☆14Feb 4, 2025Updated last year