A high-throughput VHDL and SystemVerilog implementation of AES-128 including scripts for a full front-end design process.
☆42Nov 17, 2014Updated 11 years ago
Alternatives and similar repositories for aes128-hdl
Users that are interested in aes128-hdl are comparing it to the libraries listed below
Sorting:
- Generator for VHDL regular expression matchers☆15Jan 11, 2021Updated 5 years ago
- Library of reusable VHDL components☆28Mar 7, 2024Updated 2 years ago
- Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.☆13Sep 22, 2025Updated 5 months ago
- An open-source VHDL library for FPGA design.☆32Jun 2, 2022Updated 3 years ago
- Trying to learn Wishbone by implementing few master/slave devices☆13Jan 7, 2019Updated 7 years ago
- CES VHDL utility library, with packages, memories, FIFOs, Clock Domain Crossing and more useful VHDL modules☆11Jan 17, 2022Updated 4 years ago
- A VHDL implementation of 128 bit AES encryption with a PCIe interface.☆27Jan 9, 2017Updated 9 years ago
- Deprecated - This library has been replaced by OsvvmLibraries. The links to the submodules will not be updated to the new versions.☆10Jul 22, 2020Updated 5 years ago
- HLS implementation of cuckoo hashing. Refer to paper : https://ieeexplore.ieee.org/document/7577355/☆14Dec 4, 2018Updated 7 years ago
- GSI Timing Gateware and Tools☆14Feb 25, 2026Updated last week
- Description of a RISC-V architecture based on MIPS 3000☆13Apr 24, 2023Updated 2 years ago
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 3 years ago
- VHDL Implementation of AES Algorithm☆91Jul 29, 2021Updated 4 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Nov 27, 2018Updated 7 years ago
- Hardware Snappy decompressor☆11Sep 11, 2024Updated last year
- Verilog modules for software-defined radio.☆19Dec 31, 2012Updated 13 years ago
- A JSON library implemented in VHDL.☆82Feb 8, 2026Updated last month
- Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020☆27Apr 11, 2022Updated 3 years ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- A collection of Opal Kelly provided design resources☆17Nov 7, 2025Updated 4 months ago
- Proposal to define an XML-based logging format for outputs from EDA tools and logging libraries.☆14Feb 24, 2026Updated 2 weeks ago
- LIS Network-on-Chip Implementation☆34Aug 29, 2016Updated 9 years ago
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 3 years ago
- Simple hash table on Verilog (SystemVerilog)☆51Apr 3, 2016Updated 9 years ago
- ☆12Jul 20, 2022Updated 3 years ago
- 🕒 Static Timing Analysis diagram renderer☆13Dec 13, 2023Updated 2 years ago
- ☆19Sep 12, 2022Updated 3 years ago
- Streaming based VHDL parser.☆84Jul 15, 2024Updated last year
- ☆33Apr 30, 2023Updated 2 years ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆36Dec 24, 2020Updated 5 years ago
- VHDL plugin for RgGen☆15Jan 7, 2026Updated 2 months ago
- A wrapper for GHDL to make it look like Mentor's ModelSim. Helpful for use with programs like Sigasi.☆11Jan 21, 2018Updated 8 years ago
- high level VHDL floating point library for synthesis in fpga☆18Dec 18, 2025Updated 2 months ago
- TCL framework to package Vivado IP-Cores☆14May 18, 2022Updated 3 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆42Sep 22, 2025Updated 5 months ago
- APB Logic☆24Feb 24, 2026Updated last week
- A VHDL Core Library.☆18Mar 29, 2017Updated 8 years ago
- Collaborative project to create an advanced GPU, with additional features to flesh-out the peripherals for a home-made, DIY computer.☆18Feb 26, 2023Updated 3 years ago
- PS/2 Keyboard IP written in VHDL for Xilinx FPGA☆17Jul 11, 2015Updated 10 years ago