☆33Jul 15, 2026Updated 3 months ago
Alternatives and similar repositories for fpga_cores
Users that are interested in fpga_cores are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 4 years ago
- Deprecated - This library has been replaced by OsvvmLibraries. The links to the submodules will not be updated to the new versions.☆10Jul 22, 2020Updated 6 years ago
- GitHub-based statistics highlighting interesting facts about the HDL industry☆12Jul 6, 2023Updated 3 years ago
- VHDL String Formatting Library☆27Apr 27, 2024Updated 2 years ago
- VHDL grammar for tree-sitter☆32Dec 20, 2023Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- VHDL dependency analyzer☆25Mar 10, 2020Updated 6 years ago
- VHDL related news.☆27Updated this week
- A translation of the Xilinx XPM library to VHDL for simulation purposes☆71Jul 29, 2026Updated 3 months ago
- A library of IP cores needed for FPGA-based SDR development using RHINO board with SPARTAN-6 xc6slx150t device.☆13Mar 11, 2017Updated 9 years ago
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- Interfacing VHDL and foreign languages with VUnit☆15Feb 20, 2020Updated 6 years ago
- VHDLproc is a VHDL preprocessor☆25May 12, 2022Updated 4 years ago
- cryptography ip-cores in vhdl / verilog☆43Feb 20, 2021Updated 5 years ago
- Generator for VHDL regular expression matchers☆15Jan 11, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Example of Test Driven Design with VUnit☆16Nov 22, 2021Updated 4 years ago
- Trying to verify Verilog/VHDL designs with formal methods and tools☆44Mar 7, 2024Updated 2 years ago
- A Formal Verification Methodology to lower the adoption barriers for Formal Verification of ASIC and FPGA designs in the Space sector (th…☆25Jun 29, 2026Updated 4 months ago
- Library of reusable VHDL components☆28Mar 7, 2024Updated 2 years ago
- SISO vector decoder for IRA-LDPC codes in VHDL☆12Oct 18, 2022Updated 4 years ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 4 years ago
- Proposal to define an XML-based logging format for outputs from EDA tools and logging libraries.☆14Updated this week
- Repurposing existing HDL tools to help writing better code☆227Sep 23, 2026Updated last month
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆44Sep 22, 2025Updated last year
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- VHDL plugin for RgGen☆15Jul 1, 2026Updated 3 months ago
- A high throughput FFT implementation☆20Jan 17, 2022Updated 4 years ago
- Fixed-point math library with VHDL, Python and MATLAB support☆39Aug 12, 2026Updated 2 months ago
- Hardware Snappy decompressor☆12Sep 11, 2024Updated 2 years ago
- Streaming based VHDL parser.☆86Updated this week
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆220Oct 17, 2026Updated last week
- Flexible VHDL library☆200Jun 28, 2023Updated 3 years ago
- Library with VHDL cores implementing Advanced Microcontroller Bus Architecture 5 (AMBA5) specifications such as APB, AHB, AXI, and AXI-St…☆18Oct 4, 2026Updated 3 weeks ago
- Digital FM Radio Receiver for FPGA☆67Dec 26, 2015Updated 10 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- VHDL implementation of CCSDS123 compression standard☆13Mar 30, 2019Updated 7 years ago
- RIFFA (Reusable Integration Framework for FPGA Accelerators) is a framework developed in University of California, San Diego. This projec…☆14Jul 16, 2015Updated 11 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆49Feb 12, 2026Updated 8 months ago
- A VHDL parser for syntax highlighting.☆26Updated this week
- SystemVerilog Logger☆19Apr 6, 2026Updated 6 months ago
- Synthesizable FIR filters in VHDL☆16Jul 19, 2019Updated 7 years ago
- Generic Logic Interfacing Project☆49Jul 29, 2020Updated 6 years ago