Alternatives and similar repositories for notes

Users that are interested in notes are comparing it to the libraries listed below

• yhqiu16 / NVMeCHA
  NVMe Controller featuring Hardware Acceleration
  ☆93Updated 4 years ago
• maswx / vu13p
  国产VU13P加速卡资料
  ☆77Updated 6 months ago
• black-parrot-hdk / zynq-parrot
  BlackParrot on Zynq
  ☆47Updated 7 months ago
• ucsdsysnet / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆198Updated last year
• hpcn-uam / 100G-fpga-network-stack-core
  This repo contains the Limago code
  ☆87Updated 5 months ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆132Updated 4 years ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆219Updated last year
• antmicro / nvme-verilog-pcie
  ☆79Updated 3 years ago
• alexforencich / cocotbext-pcie
  PCI express simulation framework for Cocotb
  ☆179Updated last month
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆54Updated 2 years ago
• fpgadeveloper / fpga-drive-aximm-pcie
  Example designs for FPGA Drive FMC
  ☆265Updated 9 months ago
• pulp-platform / iDMA
  A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)
  ☆184Updated 2 weeks ago
• Chainsaw-Team / Chainsaw
  a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…
  ☆66Updated last year
• opensmartnic / cocotb_primer
  understanding of cocotb （In Chinese Only）
  ☆20Updated 4 months ago
• Xilinx / Vivado-Design-Tutorials
  ☆227Updated 2 months ago
• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆127Updated 9 months ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆45Updated 2 years ago
• dpretet / axi-crossbar
  An AXI4 crossbar implementation in SystemVerilog
  ☆175Updated last month
• fpgasystems / davos
  Distributed Accelerator OS
  ☆63Updated 3 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆43Updated 4 years ago
• Xilinx / Vitis_Model_Composer
  Vitis Model Composer Examples and Tutorials
  ☆107Updated last week
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆86Updated 2 years ago
• Xilinx / XilinxBoardStore
  ☆299Updated this week
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆113Updated 3 years ago
• alknvl / axis_udp
  This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…
  ☆60Updated 3 years ago
• Xilinx / xup_fpga_vivado_flow
  AMD Xilinx University Program Vivado tutorial
  ☆40Updated 2 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆73Updated last year
• john9636 / SortingNetwork
  Implement a bitonic sorting network on FPGA
  ☆46Updated 3 years ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆176Updated 6 years ago
• WangXuan95 / FPGA-Gzip-compressor
  An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …
  ☆140Updated 2 years ago