qiujiandong / srio-controllerLinks
在FPGA上实现SRIO收发控制器
☆11Updated 3 years ago
Alternatives and similar repositories for srio-controller
Users that are interested in srio-controller are comparing it to the libraries listed below
Sorting:
- CNN accelerator implemented with Spinal HDL☆155Updated last year
- AXI总线连接器☆105Updated 5 years ago
- Translated SpinalHDL-Doc(v1.7.2) into Chinese☆51Updated 2 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆67Updated 7 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆69Updated last year
- Verilog implementation of fixed-point numbers, supports custom bit width, arithmetic, converting to float, with single cycle & pipeline v…☆213Updated 2 years ago
- upgrade to e203 (a risc-v core)☆45Updated 5 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆50Updated 5 years ago
- Open IP in Hardware Description Language.☆28Updated 2 years ago
- 学习AXI接口,以及xilinx DDR3 IP使用☆38Updated 8 years ago
- fpga跑sobel识别算法☆44Updated 4 years ago
- understanding of cocotb (In Chinese Only)☆20Updated 6 months ago
- Bitmap Processing Library & AXI-Stream Video Image VIP☆34Updated 3 years ago
- AXI协议规范中文翻译版☆165Updated 3 years ago
- 文档编写☆13Updated 5 years ago
- ☆65Updated 3 years ago
- ARM中通过APB总线连接的UART模块☆69Updated 5 years ago
- 一个基于AXI接口的PL端卷积加速器,可由PS端调用☆13Updated 2 years ago
- ☆74Updated 4 years ago
- FFT implement by verilog_测试验证已通过☆58Updated 9 years ago
- An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器,可实现视频压缩。☆140Updated last year
- 使用 Vivado+PetaLinux 为 Xilinx Zynq7 搭建 Linux 系统 —— 以 Zedboard 为例☆113Updated last year
- image processing based FPGA☆113Updated 4 years ago
- AXI DMA 32 / 64 bits☆122Updated 11 years ago
- An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …☆144Updated 2 years ago
- ☆44Updated 4 years ago
- Implement a bitonic sorting network on FPGA☆46Updated 4 years ago
- ☆38Updated 6 years ago
- ☆38Updated 10 years ago
- SDRAM controller with AXI4 interface☆98Updated 6 years ago