open-sdr / openwifi-hwView external linksLinks
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware
☆828Sep 23, 2025Updated 4 months ago
Alternatives and similar repositories for openwifi-hw
Users that are interested in openwifi-hw are comparing it to the libraries listed below
Sorting:
- open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software☆4,498Feb 4, 2026Updated last week
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆455Jan 29, 2023Updated 3 years ago
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆130Dec 5, 2025Updated 2 months ago
- HDL libraries and projects☆1,850Updated this week
- 基于ZYNQ+AD9363的开源SDR硬件☆553Sep 13, 2022Updated 3 years ago
- A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog☆224Apr 29, 2025Updated 9 months ago
- bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem☆448Apr 15, 2024Updated last year
- ANTSDR Firmware☆141Mar 22, 2023Updated 2 years ago
- Verilog Ethernet components for FPGA implementation☆2,850Feb 27, 2025Updated 11 months ago
- Open source FPGA-based NIC and platform for in-network compute☆2,206Jul 5, 2024Updated last year
- Must-have verilog systemverilog modules☆1,926Aug 2, 2025Updated 6 months ago
- Store the openwifi FPGA img (.xsa .ltx) and the related git info☆16Aug 6, 2025Updated 6 months ago
- An Open-source FPGA IP Generator☆1,047Feb 8, 2026Updated last week
- Verilog AXI components for FPGA implementation☆1,960Feb 27, 2025Updated 11 months ago
- The USRP™ Hardware Driver Repository☆1,201Updated this week
- Verilog PCI express components☆1,533Apr 26, 2024Updated last year
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,008Dec 15, 2025Updated 2 months ago
- PlutoSDR Firmware☆428Dec 12, 2025Updated 2 months ago
- Verilog library for ASIC and FPGA designers☆1,392May 8, 2024Updated last year
- Various HDL (Verilog) IP Cores☆873Jul 1, 2021Updated 4 years ago
- Build your hardware, easily!☆3,722Updated this week
- IEEE 802.11 OFDM-based transceiver system☆43Dec 15, 2017Updated 8 years ago
- Verilog AXI stream components for FPGA implementation☆859Feb 27, 2025Updated 11 months ago
- Small footprint and configurable PCIe core☆661Updated this week
- Bluetooth Low Energy (BLE) packet sniffer and transmitter for both standard and non standard (raw bit) based on Software Defined Radio (S…☆864Updated this week
- The RIFFA development repository☆864Jun 11, 2024Updated last year
- Universal utility for programming FPGA☆1,546Updated this week
- An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA comm…☆862Dec 6, 2024Updated last year
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,945Jun 27, 2024Updated last year
- PYNQ-Z1 + AD936X openwifi capable SDR platform☆121Jul 7, 2025Updated 7 months ago
- SERV - The SErial RISC-V CPU☆1,751Updated this week
- Open source SDR 4G software suite from Software Radio Systems (SRS) https://docs.srsran.com/projects/4g☆3,875Jan 26, 2026Updated 3 weeks ago
- AD9361 based USB3 SDR☆121Oct 3, 2017Updated 8 years ago
- xk265：HEVC/H.265 Video Encoder IP Core (RTL)☆269Apr 9, 2023Updated 2 years ago
- USB3 PIPE interface for Xilinx 7-Series☆244Jan 2, 2026Updated last month
- A huge VHDL library for FPGA and digital ASIC development☆449Updated this week
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,492Updated this week
- SD-Card controller, using either SPI, SDIO, or eMMC interfaces☆354Oct 18, 2025Updated 3 months ago
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆962Nov 15, 2024Updated last year