phthinh / OFDM_802_11Links
IEEE 802.11 OFDM-based transceiver system
☆35Updated 7 years ago
Alternatives and similar repositories for OFDM_802_11
Users that are interested in OFDM_802_11 are comparing it to the libraries listed below
Sorting:
- Verilog实现OFDM基带☆44Updated 9 years ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆59Updated 6 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆40Updated 10 months ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆76Updated 2 years ago
- IEEE 802.16 OFDM-based transceiver system☆26Updated 6 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆50Updated 2 years ago
- ☆14Updated 7 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆54Updated last year
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆116Updated last year
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19Updated 13 years ago
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆119Updated last month
- Reed Solomon Encoder and Decoder Digital IP☆21Updated 5 years ago
- DVB-S2 LDPC Decoder☆27Updated 11 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆23Updated 5 years ago
- - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …☆52Updated 7 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆105Updated 2 years ago
- Polar Codes Implementation on Vhdl☆13Updated 9 years ago
- MATLAB toolbox for ADI transceiver products☆63Updated 5 months ago
- An RFSoC Frequency Planner developed using Python.☆30Updated 2 years ago
- Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..☆40Updated 6 years ago
- Demonstration of Automatic Gain Control with PYNQ☆15Updated 3 years ago
- ☆17Updated 3 years ago
- LTE/WiFi/5G-NR SDR Transceiver☆54Updated 6 years ago
- Python productivity for RFSoC platforms☆79Updated 2 months ago
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆14Updated 5 years ago
- MATLAB-based FIR filter design☆59Updated 11 months ago
- A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA☆166Updated last year
- RTL implementation of components for DVB-S2☆122Updated 2 years ago
- ☆28Updated last year
- Hardware Viterbi Decoder in verilog☆26Updated 6 years ago