ZipCPU / sdspi
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
☆234Updated 3 weeks ago
Alternatives and similar repositories for sdspi:
Users that are interested in sdspi are comparing it to the libraries listed below
- Opensource DDR3 Controller☆250Updated last week
- A full-speed device-side USB peripheral core written in Verilog.☆223Updated 2 years ago
- A DDR3 memory controller in Verilog for various FPGAs☆396Updated 3 years ago
- FPGA display controller with support for VGA, DVI, and HDMI.☆222Updated 4 years ago
- WISHBONE SD Card Controller IP Core☆119Updated 2 years ago
- Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation☆257Updated 11 months ago
- USB3 PIPE interface for Xilinx 7-Series☆206Updated 2 years ago
- Verilog implementation of a RISC-V core☆108Updated 6 years ago
- Tang Mega 138K Pro examples☆66Updated last month
- A Verilog implementation of DisplayPort protocol for FPGAs☆241Updated 5 years ago
- SPI Slave for FPGA in Verilog and VHDL☆192Updated 8 months ago
- FPGA Logic Analyzer and GUI☆114Updated 2 years ago
- A simple, basic, formally verified UART controller☆287Updated last year
- Experimental flows using nextpnr for Xilinx devices☆223Updated 3 months ago
- SoC based on VexRiscv and ICE40 UP5K☆152Updated 9 months ago
- Small footprint and configurable DRAM core☆388Updated 3 weeks ago
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆294Updated 9 months ago
- Bus bridges and other odds and ends☆511Updated last week
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆72Updated 9 months ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆204Updated 4 years ago
- SPI Master for FPGA - VHDL and Verilog☆269Updated last year
- Silicon-validated SoC implementation of the PicoSoc/PicoRV32☆264Updated 4 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆129Updated 7 months ago
- 720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)☆274Updated 4 years ago
- USB Serial on the TinyFPGA BX☆135Updated 3 years ago
- Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or S…☆230Updated 8 months ago
- Basic USB 1.1 Host Controller for small FPGAs☆86Updated 4 years ago
- A simple implementation of a UART modem in Verilog.☆116Updated 3 years ago
- High throughput JPEG decoder in Verilog for FPGA☆220Updated 2 years ago
- Verilog UART☆133Updated 11 years ago