AXI4 and AXI4-Lite interface definitions
☆108Sep 20, 2020Updated 6 years ago
Alternatives and similar repositories for axi4-interface
Users that are interested in axi4-interface are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- AXI总线连接器☆110Mar 26, 2020Updated 6 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆25Nov 7, 2018Updated 7 years ago
- yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/☆138Nov 29, 2017Updated 8 years ago
- uvm AXI BFM(bus functional model)☆273Jun 23, 2013Updated 13 years ago
- Verification IP for APB protocol☆82Dec 18, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆58Jun 19, 2021Updated 5 years ago
- Contains the System Verilog description for a simplified USB host that implements the transaction, data-link, and physical layers of the …☆16Jan 13, 2015Updated 11 years ago
- AMBA AXI VIP☆478Jun 28, 2024Updated 2 years ago
- Verilog AXI components for FPGA implementation☆2,142Feb 27, 2025Updated last year
- Verification AXI-4 bus standard using UVM and System Verilog☆16Apr 7, 2018Updated 8 years ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,704Updated this week
- AXI4-Compatible Verilog Cores, along with some helper modules.☆17Mar 14, 2020Updated 6 years ago
- a simple riscv cpu☆24Dec 2, 2022Updated 3 years ago
- USB -> AXI Debug Bridge☆47Jun 5, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- AXI4 BFM in Verilog☆37Dec 13, 2016Updated 9 years ago
- Generic AXI master stub☆20Jul 17, 2014Updated 12 years ago
- AXI4 with a FIFO integrated with VIP☆25Feb 29, 2024Updated 2 years ago
- VIP for AXI Protocol☆187May 24, 2022Updated 4 years ago
- uvm_axi4lite is a uvm package for modeling and verifying AXI4 Lite protocol☆36Feb 7, 2025Updated last year
- The Unified TileLink Memory Subsystem Tester for XiangShan☆15Aug 28, 2026Updated 3 weeks ago
- ☆26Feb 26, 2024Updated 2 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆70Mar 15, 2022Updated 4 years ago
- Open FPGA Modules☆26Oct 8, 2024Updated last year
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- SDRAM controller with AXI4 interface☆108Aug 8, 2019Updated 7 years ago
- Open source FPGA-based NIC and platform for in-network compute☆71Aug 21, 2025Updated last year
- AMBA AHB 2.0 VIP in SystemVerilog UVM☆164Mar 31, 2020Updated 6 years ago
- SystemVerilog derslerinde yazdığım kodları içermektedir.☆15Nov 19, 2023Updated 2 years ago
- ☆20Jun 18, 2022Updated 4 years ago
- ☆14Jan 24, 2023Updated 3 years ago
- AXI Interconnect☆58Aug 20, 2021Updated 5 years ago
- RV32I Single Cycle Processor (CPU)☆12Nov 14, 2021Updated 4 years ago
- ☆16Jan 9, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- UART -> AXI Bridge☆78Jul 1, 2021Updated 5 years ago
- Master and Slave made using AMBA AXI4 Lite protocol.☆33Oct 9, 2020Updated 5 years ago
- AXI X-Bar☆20Apr 8, 2020Updated 6 years ago
- APB Timer Unit☆14Oct 30, 2025Updated 10 months ago
- AMBA bus lecture material☆554Jan 21, 2020Updated 6 years ago
- 《UVM实战》书本源代码和UVM 1.1d源码及Doc☆47Mar 7, 2021Updated 5 years ago
- The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )☆19Dec 12, 2025Updated 9 months ago