Alternatives and similar repositories for ZYJZGW_Kintex-7_XC7K325T_Starter_Kit

Users that are interested in ZYJZGW_Kintex-7_XC7K325T_Starter_Kit are comparing it to the libraries listed below

• ymz000 / Kintex-7-xc7k325-pcb
  基于Kintex-7 XC7K325T的高性能FPGA功能验证板
  ☆19Updated 5 years ago
• ChinaQMTECH / QMTECH_XC7K325T_CORE_BOARD
  ☆37Updated 3 years ago
• sam210723 / fpga
  Collection of projects for various FPGA development boards
  ☆44Updated last year
• openXC7 / xc7k325t-blinky-nextpnr
  ☆45Updated 2 years ago
• nandland / memory
  Single Port RAM, Dual Port RAM, FIFO
  ☆24Updated 3 years ago
• CospanDesign / nysa-verilog
  Verilog Repository for GIT
  ☆33Updated 4 years ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆41Updated 4 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆42Updated last week
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆62Updated 2 years ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆90Updated 4 years ago
• esynr3z / usb20dev
  USB 2.0 FS Device controller IP core written in SystemVerilog
  ☆36Updated 6 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆27Updated 3 years ago
• ultraembedded / core_ftdi_bridge
  FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge
  ☆32Updated 3 years ago
• ultraembedded / core_usb_uart
  USB serial device (CDC-ACM)
  ☆38Updated 4 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆41Updated 3 months ago
• ZipCPU / wbi2c
  Wishbone controlled I2C controllers
  ☆49Updated 6 months ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆64Updated last week
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆45Updated last year
• sbourdeauducq / serdes-tdc
  SERDES-based TDC core for Spartan-6
  ☆18Updated 12 years ago
• blackmesalabs / MesaBusProtocol
  Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
  ☆32Updated 6 months ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆44Updated 5 years ago
• ATaylorCEngFIET / Genesys_ZU_MIPI_PCAM
  Imaging application using MIPI and DisplayPort to process image
  ☆23Updated 5 years ago
• HarmonInstruments / verilog
  ☆20Updated 2 years ago
• VideoGPU / FMC_MIPI
  FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface
  ☆17Updated 2 years ago
• Juninho99 / FPGA_TangNano20k_Hand_Coded_DIP_LCD_Camera
  Master-thesis-final
  ☆19Updated last year
• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆27Updated 5 years ago
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆38Updated 3 years ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• Digilent / Arty-A7-35-XADC
  ☆19Updated 4 years ago
• ericgineer / CIC
  A CIC filter implemented in Verilog
  ☆22Updated 9 years ago