marcoz001 / axi-uvm
yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
☆114Updated 7 years ago
Alternatives and similar repositories for axi-uvm:
Users that are interested in axi-uvm are comparing it to the libraries listed below
- UVM AHB VIP☆83Updated 5 months ago
- AMBA AHB 2.0 VIP in SystemVerilog UVM☆148Updated 5 years ago
- VIP for AXI Protocol☆132Updated 2 years ago
- AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…☆169Updated 6 years ago
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆88Updated last year
- UVM examples and projects☆132Updated 6 years ago
- System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment☆102Updated 4 months ago
- SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core☆140Updated 6 years ago
- This repository contains an example of the use of UVM Register Abstraction Layer in a verification of a simple APB DUT.☆38Updated 4 years ago
- Verification IP for I2C protocol☆42Updated 3 years ago
- ahb scram controller, design and verification☆27Updated 6 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆121Updated 3 years ago
- This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…☆60Updated last year
- A Framework for Design and Verification of Image Processing Applications using UVM☆98Updated 7 years ago
- UVM Testbench to verify serial transmission of data between SPI master and slave☆45Updated 4 years ago
- This is the main repository for all the examples for the book Practical UVM☆190Updated 4 years ago
- UART design in SV and verification using UVM and SV☆44Updated 5 years ago
- Verification IP for APB protocol☆63Updated 4 years ago
- UVM APB VIP, part of AMBA3&AMBA4 feature supported☆31Updated 4 years ago
- uvm AXI BFM(bus functional model)☆244Updated 11 years ago
- Novel GUI Based UVM Testbench Template Builder☆128Updated 4 years ago
- a very simple risc_cpu verification demo with uvm☆22Updated 6 years ago
- SystemVerilog VIP for AMBA APB protocol☆72Updated 3 years ago
- Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence☆32Updated 4 years ago
- Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.☆49Updated 4 years ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆25Updated 2 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆58Updated 2 years ago
- Yet Another Simulation Architecture☆72Updated 4 years ago
- UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC2…☆12Updated 4 months ago
- UVM Generator☆45Updated 11 months ago