a simple riscv cpu
☆24Dec 2, 2022Updated 3 years ago
Alternatives and similar repositories for riscv_cpu
Users that are interested in riscv_cpu are comparing it to the libraries listed below
Sorting:
- RISC-V multi cycle CPU. Project of Computer Organization (THU 2020)☆17Nov 30, 2022Updated 3 years ago
- ☆10Dec 28, 2020Updated 5 years ago
- 记录一下夏季学期计算机设计与实践课上写的RISC-V单周期CPU和RISC-V五级流水线CPU☆14Sep 7, 2021Updated 4 years ago
- This repository is for students to go through the Learning Journey for CHISEL and Funcitonal Programming with SCALA also perform tasks re…☆15Sep 7, 2025Updated 5 months ago
- A RRAM addon for the NCSU FreePDK 45nm☆25Jan 10, 2022Updated 4 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆25Nov 29, 2024Updated last year
- AXI4 and AXI4-Lite interface definitions☆101Sep 20, 2020Updated 5 years ago
- This project contains code for the paper titled "SpikingBERT: Distilling BERT to Train Spiking Language Models Using Implicit Differentia…☆28Feb 21, 2024Updated 2 years ago
- MIPS 57条指令五级流水线cpu (verilog实现+详细注释)☆11Jan 11, 2022Updated 4 years ago
- AXI4 BFM in Verilog☆36Dec 13, 2016Updated 9 years ago
- ☆42Dec 5, 2025Updated 3 months ago
- FlappyBird愤怒的小鸟 c++游戏实现 学习代码☆10Nov 16, 2018Updated 7 years ago
- LLM-DSE: Searching Accelerator Parameters with LLM Agents☆13May 22, 2025Updated 9 months ago
- iEDA water-drop training initiative☆13Sep 10, 2024Updated last year
- Extending BookSim2.0 and HotSpot6.0 for Power, Performance and Thermal evaluation of 3D NoC Architectures☆12Aug 9, 2019Updated 6 years ago
- Linux Driver for Altera PCI Express☆12Jun 7, 2013Updated 12 years ago
- Network on chip based neural network accelerator☆10Mar 25, 2021Updated 4 years ago
- mumax3 with sot(spin orbit torque)☆11Mar 3, 2023Updated 3 years ago
- Project of an integrated UART: RTL, Verification, Physical Implementation (Innovus) and GDSII.☆16May 28, 2021Updated 4 years ago
- PyTorch code for full quantization of DNN using BCGD☆14Jul 24, 2019Updated 6 years ago
- Augmenting engineering workflows with Probabilistic Machine Learning☆10Feb 9, 2026Updated 3 weeks ago
- Official implementation of ECCV 2024 paper: "Event-based Mosaicing Bundle Adjustment"☆12Mar 12, 2025Updated 11 months ago
- This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is …☆11May 2, 2022Updated 3 years ago
- Original DVS128 Gesture Dataset in PyTorch☆13Jun 6, 2023Updated 2 years ago
- All Digital Phase-Locked Loop☆12May 22, 2023Updated 2 years ago
- Fork of the gem5 simulator with Garnet2.0 and DSENT extensions☆13Jan 28, 2019Updated 7 years ago
- A Scala library for Context-Dependent Environments☆51Apr 25, 2024Updated last year
- Quantized training method for RRAM-based systems.☆12Sep 24, 2018Updated 7 years ago
- O'Reilly Course, In-Memory Computing Essentials☆10Oct 16, 2020Updated 5 years ago
- A lightweight IDE that supports verilog simulation and RISC-V code compilation☆54Jul 26, 2022Updated 3 years ago
- The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.☆45Apr 11, 2021Updated 4 years ago
- ☆15Updated this week
- Spiking Neural Network Accelerator☆15May 18, 2022Updated 3 years ago
- ☆13Jul 10, 2024Updated last year
- ☆15Mar 24, 2023Updated 2 years ago
- bitfusion verilog implementation☆12Feb 21, 2022Updated 4 years ago
- Digital IC design and vlsi notes☆13Jun 24, 2020Updated 5 years ago
- A framework for ysyx flow☆13Oct 31, 2024Updated last year
- Tensor Belief Propagation - algorithm for approximate inference in discrete graphical models☆12Feb 17, 2020Updated 6 years ago