microsoft / kanagawaLinks
High level synthesis language for hardware design
☆79Updated this week
Alternatives and similar repositories for kanagawa
Users that are interested in kanagawa are comparing it to the libraries listed below
Sorting:
- Time-sensitive affine types for predictable hardware generation☆147Updated last month
- A core language for rule-based hardware design 🦑☆166Updated last week
- A Hardware Pipeline Description Language☆49Updated 5 months ago
- The HW-CBMC and EBMC Model Checkers for Verilog☆98Updated last week
- Fearless hardware design☆183Updated 4 months ago
- ☆40Updated 4 years ago
- FPGA synthesis tool powered by program synthesis☆52Updated this week
- DHLS (Dynamic High-Level Synthesis) compiler based on MLIR☆155Updated this week
- A formally verified high-level synthesis tool based on CompCert and written in Coq.☆96Updated 3 months ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆52Updated 2 years ago
- The source code to the Voss II Hardware Verification Suite☆56Updated 3 weeks ago
- BTOR2 MLIR project☆26Updated last year
- Equivalence checking with Yosys☆52Updated 2 weeks ago
- Textbook and full source codes to learn basics of RISC-V pipelined CPU design using the Bluespec Hardware Design Language(s)☆91Updated 2 months ago
- A Modeling and Verification Platform for SoCs using ILAs☆81Updated last year
- A tool for synthesizing Verilog programs☆108Updated 3 months ago
- CoreIR Symbolic Analyzer☆74Updated 5 years ago
- Pono: A flexible and extensible SMT-based model checker☆117Updated 2 weeks ago
- Open-source RTL logic simulator with CUDA acceleration☆243Updated 2 months ago
- A formalization of the RVWMO (RISC-V) memory model☆35Updated 3 years ago
- ☆104Updated 3 years ago
- Lectures for the Agile Hardware Design course in Jupyter Notebooks☆112Updated last month
- Intermediate Language (IL) for Hardware Accelerator Generators☆570Updated this week
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆162Updated last month
- high-performance RTL simulator☆184Updated last year
- A generic test bench written in Bluespec☆56Updated 5 years ago
- HeteroRefactor: Refactoring for Heterogeneous Computing with FPGA☆10Updated 4 months ago
- ILA Model Database☆24Updated 5 years ago
- IREE compiler and runtime for Snitch☆14Updated 2 months ago
- RISC-V Formal Verification Framework☆169Updated last week