A framework for formally verifying hardware security modules to be free of hardware, software, and timing side-channel vulnerabilities 🔏
☆42Nov 29, 2025Updated 10 months ago
Alternatives and similar repositories for knox
Users that are interested in knox are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A tool for formally verifying constant-time software against hardware 🕰️☆17Feb 1, 2025Updated last year
- My MEng thesis code - verifying a security property for an SoC with Rosette☆18Jun 9, 2021Updated 5 years ago
- Circuits and hardware security modules formally verified with Knox 🔐☆27Feb 1, 2025Updated last year
- Tools for reasoning about circuits in Rosette/Racket 🔌☆20Feb 1, 2025Updated last year
- Notary: A Device for Secure Transaction Approval 📟☆30Feb 1, 2025Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- A tool for checking the contract satisfaction for hardware designs☆12Jul 21, 2026Updated 2 months ago
- A collection of datapath circuit design and verification benchmarks☆19Aug 24, 2026Updated last month
- baby's first liquid type system☆15Aug 15, 2023Updated 3 years ago
- RTLCheck☆26Oct 9, 2018Updated 8 years ago
- An exact real arithmetic (aka constructive reals) for OCaml☆13Jun 14, 2024Updated 2 years ago
- Symbolic execution tool for Sail ISA specifications☆100Sep 23, 2026Updated 3 weeks ago
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- A Modeling and Verification Platform for SoCs using ILAs☆81Jul 3, 2024Updated 2 years ago
- ☆15Dec 6, 2023Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- SimCommand is a library for writing high-performance RTL testbenches with simulation threads in Scala using chiseltest.☆16Aug 30, 2023Updated 3 years ago
- The HW-CBMC and EBMC Model Checkers for Verilog☆116Updated this week
- Fast Setup for Proof by Reflection, in Two Lines of Ltac.☆14Jan 12, 2021Updated 5 years ago
- Partial evaluator for Arm's Architecture Specification Language (ASL)☆21Jun 12, 2026Updated 4 months ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated 2 years ago
- FPGA synthesis tool powered by equality saturation and program synthesis.☆15Jan 9, 2026Updated 9 months ago
- ☆38Oct 4, 2026Updated 2 weeks ago
- Egraphs Modulo Theories☆20Jun 10, 2025Updated last year
- Iodine: Verifying Constant-Time Execution of Hardware☆18Mar 29, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ILA Model Database☆26Sep 27, 2020Updated 6 years ago
- ☆20Dec 29, 2014Updated 11 years ago
- A programming language for writing constraint-based integrated circuit layout generators☆17Updated this week
- ☆11Nov 19, 2015Updated 10 years ago
- A Lean-embedded framework to verify Verilog modules☆16Oct 6, 2026Updated last week
- Automatically generate a compiler using equality saturation☆36Apr 3, 2024Updated 2 years ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 3 years ago
- Code repository for Coppelia tool☆22Nov 12, 2020Updated 5 years ago
- A tool to convert binary files to COE files 💫☆18Jun 24, 2026Updated 3 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A core language for rule-based hardware design 🦑☆189Dec 10, 2025Updated 10 months ago
- Code for the CCS 2022 paper "Microarchitectural Leakage Templates and Their Application to Cache-Based Side Channels".☆17Oct 17, 2022Updated 4 years ago
- ☆21Jun 12, 2024Updated 2 years ago
- ☆23Mar 12, 2026Updated 7 months ago
- E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis (DAC2025)☆32Jun 23, 2025Updated last year
- ☆18Jul 12, 2024Updated 2 years ago
- ILAng documentation☆12Nov 2, 2025Updated 11 months ago