anishathalye / knoxLinks
A framework for formally verifying hardware security modules to be free of hardware, software, and timing side-channel vulnerabilities 🔏
☆40Updated last month
Alternatives and similar repositories for knox
Users that are interested in knox are comparing it to the libraries listed below
Sorting:
- A tool for formally verifying constant-time software against hardware 🕰️☆13Updated 11 months ago
- CHERI-RISC-V model written in Sail☆66Updated 6 months ago
- BTOR2 MLIR project☆26Updated last year
- Iodine: Verifying Constant-Time Execution of Hardware☆15Updated 4 years ago
- Verifying OpenTitan☆28Updated 2 years ago
- The source code to the Voss II Hardware Verification Suite☆56Updated last month
- Formal specification and verification of hardware, especially for security and privacy.☆128Updated 3 years ago
- The HW-CBMC and EBMC Model Checkers for Verilog☆101Updated this week
- Automatically generate a compiler using equality saturation☆34Updated last year
- Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification☆20Updated 4 months ago
- ☆21Updated this week
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆90Updated last month
- Code repository for Coppelia tool☆23Updated 5 years ago
- Pono: A flexible and extensible SMT-based model checker☆117Updated this week
- A formally verified high-level synthesis tool based on CompCert and written in Coq.☆96Updated 2 weeks ago
- IC3PO: IC3 for Proving Protocol Properties☆28Updated last year
- Information about verification tools. Browse the data at https://slebok.github.io/proverb/☆32Updated 2 years ago
- RTLCheck☆24Updated 7 years ago
- CoreIR Symbolic Analyzer☆74Updated 5 years ago
- Integer Multiplier Generator for Verilog☆23Updated 6 months ago
- Verilog development and verification project for HOL4☆27Updated 8 months ago
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Updated last year
- Random Generator of Btor2 Files☆10Updated 2 years ago
- ☆19Updated last year
- ☆16Updated 4 years ago
- CVC4 is an efficient open-source automatic theorem prover for satisfiability modulo theories (SMT) problems.☆21Updated 4 years ago
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission☆11Updated 6 months ago
- Tools for manipulating CHC and related files☆15Updated 2 years ago
- SMTSampler: Efficient Stimulus Generation from Complex SMT Constraints☆31Updated 6 years ago
- Testing processors with Random Instruction Generation☆50Updated last month