Alternatives and similar repositories for shakeflow

Users that are interested in shakeflow are comparing it to the libraries listed below

• kaist-cp / hazardflow
  HazardFlow: Modular Hardware Design of Pipelined Circuits with Hazards IMPORTANT: DON'T FORK!
  ☆20Updated last year
• kaist-cp / cs492-uarch
  ☆43Updated last year
• kaist-cp / memento
  Memento: A Framework for Detectable Recoverability in Persistent Memory (PLDI 2023)
  ☆18Updated 2 years ago
• kaist-cp / rv6
  ☆135Updated 2 years ago
• kaist-cp / kecc-public
  KECC: KAIST Educational C Compiler. IMPORTANT: DON'T FORK!
  ☆177Updated 7 months ago
• casys-kaist / kev
  KAIST Educational Virtualization
  ☆16Updated last year
• apl-cornell / PDL
  A Hardware Pipeline Description Language
  ☆49Updated 6 months ago
• kaist-cp / helpdesk
  ☆23Updated 4 years ago
• kaist-cp / circ
  CIRC: Concurrent Immediate Reference Counting
  ☆54Updated last year
• aqjune / mlir-tv
  A translation validation framework for MLIR
  ☆92Updated 10 months ago
• microsoft / kanagawa
  High level synthesis language for hardware design
  ☆81Updated last month
• hongseok-yang / graduatePL23
  ☆19Updated 2 years ago
• vegaluisjose / reticle
  ☆40Updated 4 years ago
• cucapra / dahlia
  Time-sensitive affine types for predictable hardware generation
  ☆148Updated 3 weeks ago
• hyn2028 / kecc-ir-highlight
  Support for language highlighting of KECC(KAIST Educational C Compiler) IR
  ☆12Updated 3 years ago
• litz-lab / scarab-infra
  A set of tools that automate the execution of scarab simulations
  ☆18Updated this week
• mit-plv / koika
  A core language for rule-based hardware design 🦑
  ☆170Updated last month
• CMU-SAFARI / Virtuoso
  Virtuoso is a fast, accurate and versatile simulation framework designed for virtual memory research. Virtuoso uses a new simulation met…
  ☆80Updated 2 weeks ago
• hongseok-yang / logic21
  ☆22Updated 4 years ago
• CTSRD-CHERI / sail-cheri-riscv
  CHERI-RISC-V model written in Sail
  ☆66Updated 6 months ago
• prosyslab-classroom / cs424-program-reasoning
  ☆55Updated last month
• prosyslab-classroom / cs524-program-analysis
  ☆63Updated 3 weeks ago
• kaist-cp / smr-benchmark
  SMR Benchmark: A Microbenchmark Suite for Concurrent Safe Memory Reclamation Schemes
  ☆44Updated 5 months ago
• heterorefactor / heterorefactor
  HeteroRefactor: Refactoring for Heterogeneous Computing with FPGA
  ☆10Updated 5 months ago
• mit-plv / hemiola
  A Coq framework to support structural design and proof of hardware cache-coherence protocols
  ☆14Updated 3 years ago
• calyxir / calyx-riscv
  RISCV Core written in Calyx
  ☆17Updated last year
• daniellustig / riscv-memory-model
  A formalization of the RVWMO (RISC-V) memory model
  ☆35Updated 3 years ago
• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆35Updated this week
• uwplse / rake
  compiling DSLs to high-level hardware instructions
  ☆23Updated 3 years ago
• TeamVoss / VossII
  The source code to the Voss II Hardware Verification Suite
  ☆56Updated last week