Spire is a Python embedded domain-specific language (DSL) for RTL generation. Its built-in optimizations reduce area and delay of circuits and often beat the traditional Verilog/Yosys flow.
☆39Sep 14, 2026Updated this week
Alternatives and similar repositories for spire-hdl
Users that are interested in spire-hdl are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Code for the Paper GENIAL: Generative Design Space Exploration via Network Inversion for Low Power Algorithmic Logic Units☆24May 22, 2026Updated 3 months ago
- Welcome to the official repository of AC-LORA: (Almost) Training-Free Access Control-Aware Multi-Modal LLMs, a mechanism that provides tr…☆21Nov 14, 2025Updated 10 months ago
- ☆19Dec 21, 2020Updated 5 years ago
- ☆33Jan 7, 2025Updated last year
- Contract-Aware RTL Code Generation Agents with Temporal Tracing, Slicing and Formal Verification☆24Jan 28, 2026Updated 7 months ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- C++ header-only exact synthesis library☆19Jan 18, 2023Updated 3 years ago
- Open-source RTL logic simulator with CUDA acceleration☆300Sep 30, 2025Updated 11 months ago
- 🚀 Fast AI web browser agent to automate repetitive tasks☆20May 2, 2026Updated 4 months ago
- Mobilenet v1 (3,128,128, alpha=0.25) on STMH7 using STMCube AI☆10Oct 25, 2019Updated 6 years ago
- Code for the Change-Based Inference Paper (CBinfer)☆10Jan 7, 2019Updated 7 years ago
- A collection of datapath circuit design and verification benchmarks☆19Aug 24, 2026Updated 3 weeks ago
- Elexis 3 Base Repository☆16Updated this week
- A BDD-based Quantum Circuit Equivalence Checker☆15Jun 29, 2026Updated 2 months ago
- The RAS Error-record Register Interface provides a specification to augment RAS features in RISC-V SOC hardware to standardize reporting …☆11Sep 9, 2026Updated last week
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Digital logic benchmark suite☆87Sep 10, 2026Updated last week
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆23Sep 11, 2026Updated last week
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated 2 years ago
- A Circuit Design Frontend based on Python☆26Aug 30, 2026Updated 3 weeks ago
- An irb-workalike for Lua, and a command-line debugger with readline support.☆15Aug 18, 2009Updated 17 years ago
- AIGER And-Inverter-Graph Library☆105Feb 17, 2026Updated 7 months ago
- GOMIL: Global Optimization of Multiplier by Integer Linear Programming☆13Aug 25, 2021Updated 5 years ago
- Natural Language Exploration of Hardware Designs and Libraries (ICLAD'25) -- Best Paper Award☆18Jul 14, 2025Updated last year
- IceZUM Alhambra: an Arduino/zum-like Open FPGA electronic board. Synthesize hardware easily, using only open source tools☆18Mar 15, 2016Updated 10 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- OpenROAD Agent. This repository contain the model to train and testing the model using EDA Corpus dataset.☆33Jul 24, 2025Updated last year
- A simple Python tool to create pinout overviews of ICs.☆41Feb 17, 2024Updated 2 years ago
- ☆23Mar 12, 2026Updated 6 months ago
- Benchmarks for Yosys development☆25Feb 17, 2020Updated 6 years ago
- The official repo of NeurIPS2025 Paper: High-Performance Arithmetic Circuit Optimization via Differentiable Architecture Search☆19Oct 19, 2025Updated 11 months ago
- Open source fpga project leveraging vtr CAD flow.☆26Mar 4, 2023Updated 3 years ago
- A repository for academic works on RTL generation and Analog circuit generation based on LLM☆34Updated this week
- MNT Bench - An MNT tool for Benchmarking FCN circuits☆14Updated this week
- Layout and simulation files of the paper "QuickSim: Efficient and Accurate Physical Simulation of Silicon Dangling Bond Logic" by J. Drew…☆10Mar 6, 2023Updated 3 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆42Updated this week
- Set up a specific version of the Z3 theorem prover☆14Updated this week
- ☆31Apr 23, 2024Updated 2 years ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆17Oct 6, 2019Updated 6 years ago
- An automatic clock gating utility☆53Apr 15, 2025Updated last year
- A collection of reusable GitHub workflows used throughout the MQT☆11Updated this week
- A Lua-based framework for vision.☆21Jun 14, 2011Updated 15 years ago