- Designed a Nand Flash Controller, Flash Memory and Buffer (Design Target : Samsung K9F1G08R0A NAND Flash).
- Implemented operations : Controller Reset, Memory Erase, Program Page and Page Read.
- Functional Verification of DUT : Test Plan, Environment Setup, Constraint Randomization, Corner test cases covered.
- Programming Language : Syste…
☆21Apr 15, 2018Updated 8 years ago
Alternatives and similar repositories for Design-and-Verification-of-Nand-Flash-Memory-Controller
Users that are interested in Design-and-Verification-of-Nand-Flash-Memory-Controller are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆18Jun 3, 2019Updated 6 years ago
- ☆46Apr 11, 2017Updated 9 years ago
- Verilog and matlab implementation of tanh using Cordic algorithm☆11Jun 5, 2020Updated 5 years ago
- This script builds the UVM register model, based on pre-defined address map in markdown (mk) style☆12Mar 23, 2018Updated 8 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆14Nov 9, 2015Updated 10 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- AXI Interface Nand Flash Controller (Sync mode)☆105Aug 9, 2024Updated last year
- Pipeline CPU of MIPS architecture with L1 Data Cache by Verilog☆20Mar 11, 2021Updated 5 years ago
- Synchronous FIFOs designed in Verilog/System Verilog.☆25Dec 21, 2025Updated 3 months ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 11 years ago
- Python bindings for coreir☆11Sep 13, 2023Updated 2 years ago
- ☆48Apr 7, 2024Updated 2 years ago
- UVM testbench for verifying the Pulpino SoC☆13Mar 23, 2020Updated 6 years ago
- ☆15May 10, 2019Updated 6 years ago
- study uvm step by step☆11Mar 28, 2019Updated 7 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Verilog cache implementation of 4-way FIFO 16k Cache☆20Dec 8, 2012Updated 13 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Apr 10, 2026Updated last week
- ☆14Feb 24, 2025Updated last year
- A simple SystemVerilog digital phase-locked loop based (roughly) on TI's SDLA005B application note. The design includes a SystemVerilog t…☆15Aug 29, 2022Updated 3 years ago
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 7 years ago
- A min-sum LDPC decoder written in SystemVerilog (IEEE 1800-2012)☆12Jan 8, 2021Updated 5 years ago
- MT29F128G based NAND flash controller☆10Jun 17, 2021Updated 4 years ago
- Formal Verification of RISC V IM Processor☆11Mar 27, 2022Updated 4 years ago
- AHB-Lite Quad I/O SPI Flash memory controller with direct mapped cache and support for XiP☆16Nov 9, 2023Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Software control for CASPER FPGAs☆22Feb 5, 2026Updated 2 months ago
- mirror of https://git.elphel.com/Elphel/eddr3☆42Oct 16, 2017Updated 8 years ago
- Building a simple oscilloscope using FPGA board and PCB.☆21Dec 30, 2020Updated 5 years ago
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆26Mar 8, 2026Updated last month
- ☆26May 31, 2021Updated 4 years ago
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 6 years ago
- LLVM based HLS library for HWToolkit (hardware devel. toolkit)☆29Jan 21, 2026Updated 2 months ago
- Superscalar Out-of-Order NPU Design on FPGA☆13May 17, 2024Updated last year
- Design, verification and ASIC implementation of a complete RISC-V CPU with: five stages pipeline, forwarding, automatic hazard detection,…☆16Apr 12, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- an open source uvm verification platform for e200 (riscv)☆29May 5, 2018Updated 7 years ago
- a very simple risc_cpu verification demo with uvm☆27Apr 28, 2019Updated 6 years ago
- Haar wavelet based Discrete wavelet transform for ECG feature extraction in Verilog☆20Jul 21, 2015Updated 10 years ago
- RTL for mipi serialize and deserialize☆11Oct 16, 2017Updated 8 years ago
- This repository contains an example of the connection between an UVM Testbench and a Python reference model using UVM Connect from Mentor…☆17Feb 21, 2020Updated 6 years ago
- This repository contains all the materials related to the basic MOSFET theory, CMOS technology, circuit and layout design, and basic PDK …☆14Dec 15, 2023Updated 2 years ago
- Contains examples to start with Kactus2.☆23Aug 5, 2024Updated last year