Alternatives and similar repositories for kb:

Users that are interested in kb are comparing it to the libraries listed below

• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆57Updated 3 years ago
• thu-cs-lab / verilog-coding-standard
  Recommended coding standard of Verilog and SystemVerilog.
  ☆34Updated 3 years ago
• thu-cs-lab / tanlabs
  Tsinghua Advanced Networking Labs on FPGA
  ☆38Updated 4 months ago
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆114Updated 4 months ago
• jiegec / cpu-micro-benchmarks
  CPU micro benchmarks
  ☆50Updated this week
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆24Updated last month
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆38Updated 7 months ago
• IPADS-DuVisor / kvm-tutorial
  ☆23Updated last year
• jiegec / unofficial-loongarch-intrinsics-guide
  Unofficial LoongArch Intrinsics Guide
  ☆42Updated 2 weeks ago
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆13Updated 3 years ago
• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆19Updated 2 years ago
• KuangjuX / hypocaust-2
  hypocaust-2, a type-1 hypervisor with H extension run on RISC-V machine
  ☆54Updated last year
• ISRC-CAS / tarsier-oerv
  Project magament for porting openEuler to RISC-V
  ☆34Updated last year
• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆30Updated 2 years ago
• meow-chip / MeowRouter
  A hardware accelerated IP packet forwarder running on programmable ICs
  ☆16Updated 2 years ago
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆11Updated 2 years ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated last year
• jiegec / rocket-chip-vcu128
  Run Rocket Chip on VCU128
  ☆29Updated 3 months ago
• jiegec / chisel-memory-lower
  Lower chisel memories to SRAM macros
  ☆12Updated 11 months ago
• cogbt / COGBT
  Compile Optimization Guided Binary Translator (using llvm as infrastructure)
  ☆47Updated 7 months ago
• thu-cs-lab / Digital-Design-Docs
  Documentation for Digital Design course
  ☆19Updated 2 weeks ago
• jiegec / Projects
  A summarize of my projects.
  ☆47Updated 9 months ago
• thu-cs-lab / Router-Lab-Docs
  Documentation for Router Lab
  ☆67Updated this week
• OS-F-4 / usr-intr
  项目的主仓库
  ☆23Updated 2 years ago
• cnrv / RVWC2021-slides
  第一届 RISC-V 中国峰会的幻灯片等资料存放
  ☆37Updated 2 years ago
• cnyangkun / nscscc2017
  National Student Computer System Capability Challenge
  ☆9Updated 6 years ago
• comparch-security / FlexiCAS
  A Flexible Cache Architectural Simulator
  ☆13Updated 3 months ago
• Oyami-Srk / RISCV-GDB-Paging
  Paging Debug tool for GDB using python
  ☆13Updated 2 years ago