Alternatives and similar repositories for kb

Users that are interested in kb are comparing it to the libraries listed below

• jiegec / cpu-micro-benchmarks
  CPU micro benchmarks
  ☆57Updated last week
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆62Updated 3 years ago
• IPADS-DuVisor / kvm-tutorial
  ☆23Updated last year
• thu-cs-lab / verilog-coding-standard
  Recommended coding standard of Verilog and SystemVerilog.
  ☆34Updated 3 years ago
• howardlau1999 / yatcpu
  Yet another toy CPU.
  ☆91Updated last year
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆36Updated last month
• ISRC-CAS / tarsier-oerv
  Project magament for porting openEuler to RISC-V
  ☆34Updated last year
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆13Updated 3 years ago
• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆31Updated 2 years ago
• thu-cs-lab / tanlabs
  Tsinghua Advanced Networking Labs on FPGA
  ☆38Updated 7 months ago
• oscomp / proj47-tee-os
  面向可信执行环境的OS。
  ☆12Updated 3 weeks ago
• jiegec / blog-source
  The source of my blog.
  ☆25Updated this week
• jiegec / unofficial-loongarch-intrinsics-guide
  Unofficial LoongArch Intrinsics Guide
  ☆54Updated this week
• chyyuu / thoughts
  ☆42Updated last year
• thu-cs-lab / Digital-Design-Docs
  Documentation for Digital Design course
  ☆20Updated 2 months ago
• NickCao / cumu
  ☆11Updated last year
• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆19Updated 2 years ago
• cogbt / COGBT
  Compile Optimization Guided Binary Translator (using llvm as infrastructure)
  ☆47Updated 9 months ago
• plctlab / plct-toolbox
  PLCT工具箱
  ☆31Updated 3 years ago
• cnrv / RVWC2021-slides
  第一届 RISC-V 中国峰会的幻灯片等资料存放
  ☆37Updated 2 years ago
• CircuitCoder / ld.meow.so
  Toy ELF dynlinker & interp
  ☆10Updated 11 months ago
• jiegec / chisel-memory-lower
  Lower chisel memories to SRAM macros
  ☆12Updated last year
• thu-cs-lab / Router-Lab-Docs
  Documentation for Router Lab
  ☆67Updated 3 weeks ago
• LyricZhao / ThinRouter
  A SystemVerilog implementation of MIPS32 CPU and RIP router
  ☆23Updated 5 years ago
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆117Updated 7 months ago
• ZenithalHourlyRate / learn-git-the-not-so-super-hard-way
  ☆17Updated 3 years ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• hellollvm / nanpanjiang-project
  由HelloLLVM社区主席邱吉博士发起，联合HelloGCC等技术社区，推出了「南盘江计划」，致力于帮助更多的女性工程师在编译等基础软件领域实现个人职业目标。
  ☆35Updated last week
• jiegec / la-inst
  Examine and discover LoongArch instructions
  ☆15Updated last year