Alternatives and similar repositories for cpu-micro-benchmarks:

Users that are interested in cpu-micro-benchmarks are comparing it to the libraries listed below

• aakahlow / gem5Valid_Haswell
  ☆18Updated 5 years ago
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆29Updated 3 weeks ago
• JamesAslan / MicroArchBench
  ☆68Updated 5 months ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• miaochenlu / Gem5_tutorials
  ☆19Updated last year
• UT-LCA / Scalability-Phase-Simpoint-of-SPEC-CPU2017
  ☆32Updated 5 years ago
• CMU-SAFARI / Virtuoso
  Virtuoso is a new simulator that focuses on modelling various memory management and virtual memory aspects.
  ☆44Updated 2 weeks ago
• riscv / riscv-control-transfer-records
  This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…
  ☆20Updated last month
• yhtzd / skyloft
  Skyloft: A General High-Efficient Scheduling Framework in User Space (SOSP 2024)
  ☆33Updated 7 months ago
• xuefeng16 / Tyche-Artifact
  [TACO 2024] A hardware prefetching framework employing Tyche, a hardware prefetcher designed for indirect memory access patterns.
  ☆21Updated last year
• OpenXiangShan / Deterload
  Xiangshan deterministic workloads generator
  ☆17Updated last month
• hanhwi / SimPoint
  ☆12Updated 2 years ago
• miaochenlu / learn_prefetcher
  hardware & software prefetcher
  ☆23Updated last year
• darchr / gem5-skylake-config
  gem5 configuration for intel's skylake micro-architecture
  ☆47Updated 3 years ago
• MaxXSoft / Frenda
  Split large FIRRTL into separated modules for incremental compilation.
  ☆10Updated 3 years ago
• OpenXiangShan / xfuzz
  Fuzzing General-Purpose Hardware Designs with Software Fuzzers
  ☆16Updated last month
• ljwljwljwljw / DiplomaticBackend
  ☆17Updated 3 years ago
• jiegec / apple-pmu
  Dump Apple PMU counter definitions from `/usr/share/kpep` in macOS
  ☆12Updated 2 weeks ago
• ucb-bar / ccbench
  Memory System Microbenchmarks
  ☆62Updated 2 years ago
• kuczmmar / Runahead
  Running ahead of memory latency - Part II project
  ☆10Updated 2 years ago
• nus-comparch / looppoint
  Sampled simulation of multi-threaded applications using LoopPoint methodology
  ☆16Updated last year
• cogbt / COGBT
  Compile Optimization Guided Binary Translator (using llvm as infrastructure)
  ☆47Updated 8 months ago
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆31Updated last year
• shinezyy / gem5-official-old
  ☆16Updated 3 years ago
• baichen318 / arch-explorer
  ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis
  ☆31Updated last year
• SamAinsworth / gem5-triangel
  ☆13Updated last month
• ucb-bar / virgo
  Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC
  ☆20Updated 3 weeks ago
• THU-DSP-LAB / llvm-project
  LLVM OpenCL C compiler suite for ventus GPGPU
  ☆43Updated last week
• comparch-security / FlexiCAS
  A Flexible Cache Architectural Simulator
  ☆14Updated 4 months ago
• cslab-ntua / contiguity-isca2020
  Linux source code for ISCA 2020 paper "Enhancing and Exploiting Contiguity for Fast Memory Virtualization"
  ☆18Updated 4 years ago