Alternatives and similar repositories for MeowRouter

Users that are interested in MeowRouter are comparing it to the libraries listed below

• jiegec / naiverouter
  A router IP written in Verilog.
  ☆13Updated 5 years ago
• CircuitCoder / MeowRust
  Relaxed Rust (for cats)
  ☆16Updated 5 years ago
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆13Updated 3 years ago
• Harry-Chen / HERMES
  HERMES: sHallow dirEctory stRucture Many-filE fileSystem
  ☆20Updated 6 years ago
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆11Updated 2 years ago
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• twd2 / fpga-nat64
  A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.
  ☆31Updated 5 years ago
• MashPlant / decaf-old
  THU compiler principle course homework, written in rust. (this is not the pa framework)
  ☆14Updated 6 years ago
• CircuitCoder / mill
  RV32I by cats
  ☆16Updated last year
• KireinaHoro / khtcp
  PKU CompNet'19 Lab 2 - Homebrew TCP
  ☆12Updated 5 years ago
• ZenithalHourlyRate / naming
  ☆11Updated last year
• Konano / THUCTF2019-Writeups
  THUCTF2019 Writeups
  ☆11Updated 5 years ago
• Harry-Chen / TrivialTomasulo
  Tomasulo Simulator written in React as the project for Computer Architecture course, Spring 2019, Tsinghua University
  ☆11Updated 6 years ago
• jiegec / verilog-format
  A naive verilog/systemverilog formatter
  ☆21Updated 2 months ago
• Fugoes / yaay-rs
  Yet Another AsYnc runtime for RuSt.
  ☆34Updated 5 years ago
• twd2 / roload
  My DAC '21 work open-sourced.
  ☆14Updated 4 years ago
• Fugoes / ctrj
  Compile Time RapidJSON: A compile time C++ header only JSON library without bloating yet another hand-crafted JSON parser based on RapidJ…
  ☆15Updated 4 years ago
• jiegec / Projects
  A summary of my projects
  ☆49Updated 3 months ago
• TrivialCompiler / Talk
  Tex source for talk slide.
  ☆10Updated 4 years ago
• CircuitCoder / ld.meow.so
  Toy ELF dynlinker & interp
  ☆10Updated last year
• monkey2000 / LPi4A-Case
  A 3d printed case design for Lichee Pi 4A
  ☆12Updated 2 years ago
• dramforever / finlog
  Compiling finite generators to digital logic. WIP
  ☆14Updated 4 years ago
• thu-cs-lab / tanlabs
  Tsinghua Advanced Networking Labs on FPGA
  ☆38Updated 7 months ago
• CircuitCoder / ChannelOS
  What if everything is a io_uring?
  ☆16Updated 2 years ago
• CircuitCoder / cidr-calc
  CIDR union / subtraction
  ☆14Updated 4 months ago
• typekernel / typekernel
  Warning: 🕳 ahead!
  ☆16Updated 5 years ago
• Lancern / soda
  Convert shared libraries into relocatable objects
  ☆10Updated last year
• madsys-dev / syscall_intercept
  The system call intercepting library
  ☆22Updated 2 years ago
• jiegec / learn_tsinghua_app
  网络学堂 PC 端 App
  ☆21Updated 2 years ago
• jiegec / chisel-memory-lower
  Lower chisel memories to SRAM macros
  ☆12Updated last year