Alternatives and similar repositories for MeowRouter

Users that are interested in MeowRouter are comparing it to the libraries listed below

• jiegec / naiverouter
  A router IP written in Verilog.
  ☆12Updated 5 years ago
• CircuitCoder / MeowRust
  Relaxed Rust (for cats)
  ☆14Updated 5 years ago
• twd2 / fpga-nat64
  A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.
  ☆30Updated 5 years ago
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆13Updated 3 years ago
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆10Updated 3 years ago
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• cyyself / cyyrv64
  My RV64 CPU (Work in progress)
  ☆19Updated 2 years ago
• jiegec / SPECCPU2017Harmony
  Run SPEC CPU 2017 benchmark on OpenHarmony/HarmonyOS NEXT
  ☆28Updated 4 months ago
• CircuitCoder / mill
  RV32I by cats
  ☆15Updated 2 years ago
• thu-cs-lab / tanlabs
  Tsinghua Advanced Networking Labs on FPGA
  ☆38Updated 11 months ago
• ZenithalHourlyRate / naming
  ☆11Updated last year
• thu-cs-lab / jieplag
  Plagiarism detection tool in Rust (inspired by Stanford Moss)
  ☆52Updated last month
• taoky / ayano
  Follow nginx log, and find out bad guys!
  ☆23Updated last week
• ZenithalHourlyRate / learn-git-the-not-so-super-hard-way
  ☆17Updated 3 years ago
• Harry-Chen / TrivialTomasulo
  Tomasulo Simulator written in React as the project for Computer Architecture course, Spring 2019, Tsinghua University
  ☆11Updated 6 years ago
• jiegec / Projects
  A summary of my projects
  ☆49Updated 3 months ago
• jiegec / verilog-format
  A naive verilog/systemverilog formatter
  ☆21Updated 7 months ago
• Harry-Chen / HERMES
  HERMES: sHallow dirEctory stRucture Many-filE fileSystem
  ☆20Updated 6 years ago
• jiegec / kb
  My knowledge base
  ☆71Updated this week
• jiegec / learn_tsinghua_app
  网络学堂 PC 端 App
  ☆21Updated 2 years ago
• twd2 / roload
  My DAC '21 work open-sourced.
  ☆14Updated 4 years ago
• MashPlant / lalr1
  An LALR1(1)/LL(1) parser generator in Rust, for multiple languages.
  ☆49Updated 3 years ago
• KireinaHoro / khtcp
  PKU CompNet'19 Lab 2 - Homebrew TCP
  ☆12Updated 5 years ago
• thu-cs-lab / thinpad_top
  Project template for Artix-7 based Thinpad board
  ☆52Updated last month
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• madsys-dev / syscall_intercept
  The system call intercepting library
  ☆23Updated 3 years ago
• typekernel / typekernel
  Warning: 🕳 ahead!
  ☆16Updated 5 years ago
• monkey2000 / LPi4A-Case
  A 3d printed case design for Lichee Pi 4A
  ☆11Updated 2 years ago
• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆19Updated 2 years ago