Lab for Network Principles since 2019-2020 fall
☆175Sep 22, 2025Updated 5 months ago
Alternatives and similar repositories for Router-Lab
Users that are interested in Router-Lab are comparing it to the libraries listed below
Sorting:
- Project template for Artix-7 based Thinpad board☆52Sep 13, 2025Updated 5 months ago
- A naive verilog/systemverilog formatter☆21Mar 22, 2025Updated 11 months ago
- A router IP written in Verilog.☆12Dec 20, 2019Updated 6 years ago
- 计算机组成原理课程32位监控程序☆50Jun 2, 2020Updated 5 years ago
- A hardware accelerated IP packet forwarder running on programmable ICs☆15Jan 21, 2023Updated 3 years ago
- Relaxed Rust (for cats)☆14Nov 20, 2019Updated 6 years ago
- Backend & Frontend for JieLabs☆22Mar 3, 2023Updated 2 years ago
- Documentation for Router Lab☆70Nov 19, 2025Updated 3 months ago
- A hand-written recursive decent Verilog parser.☆10Jan 30, 2026Updated last month
- HERMES: sHallow dirEctory stRucture Many-filE fileSystem☆20Jun 9, 2019Updated 6 years ago
- Compiling finite generators to digital logic. WIP☆13Aug 24, 2020Updated 5 years ago
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆61Feb 17, 2022Updated 4 years ago
- RV32I by cats☆15Sep 4, 2023Updated 2 years ago
- A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.☆30May 14, 2020Updated 5 years ago
- [AFK] Hardware router in Chisel (THU Network Joint Lab 2020)☆14Oct 8, 2020Updated 5 years ago
- Tsinghua Advanced Networking Labs on FPGA☆39Oct 24, 2024Updated last year
- Warning: 🕳 ahead!☆16Jan 8, 2020Updated 6 years ago
- 网络学堂 PC 端 App☆21Feb 4, 2023Updated 3 years ago
- 计算机组成原理课程 RISC-V 监控程序，支持 32 位和 64 位☆127Dec 4, 2025Updated 2 months ago
- 在线图书借阅系统 - 2017 THU OOP课大作业☆13Jul 1, 2018Updated 7 years ago
- Convert regex(es) to dfa.☆14Apr 30, 2021Updated 4 years ago
- A SystemVerilog implementation of MIPS32 CPU and RIP router☆22Jan 12, 2020Updated 6 years ago
- THU Bell on macOS☆28Feb 24, 2020Updated 6 years ago
- An LALR1(1)/LL(1) parser generator in Rust, for multiple languages.☆49Mar 29, 2022Updated 3 years ago
- A mini (consistent-wannabe) proof-assistant with power roughly equivalent to intelligence of a two month old cat☆16Mar 12, 2022Updated 3 years ago
- ☆20Dec 11, 2024Updated last year
- ucore+ repository for OS laboratory 2015☆10Jun 1, 2018Updated 7 years ago
- A summary of my projects☆49Dec 29, 2025Updated 2 months ago
- Dockerfile with Vivado for CI☆27Apr 17, 2020Updated 5 years ago
- The new Decaf compiler, rewritten in "modern" Java☆66Jul 21, 2020Updated 5 years ago
- OS Tutorial Summer of Code 2020☆19Jun 7, 2022Updated 3 years ago
- Naïve MIPS32 SoC implementation☆118Jun 23, 2020Updated 5 years ago
- My knowledge base☆79Feb 21, 2026Updated last week
- Tomasulo Simulator written in React as the project for Computer Architecture course, Spring 2019, Tsinghua University☆11Jun 9, 2019Updated 6 years ago
- A 3d printed case design for Lichee Pi 4A☆11May 13, 2023Updated 2 years ago
- PKU CompNet'19 Lab 2 - Homebrew TCP☆12Nov 29, 2019Updated 6 years ago
- Various data structures implementation, in STL style☆11Jul 26, 2021Updated 4 years ago
- Implements kernels with RISC-V Vector☆22Mar 24, 2023Updated 2 years ago
- THU compiler principle course homework, written in rust. (this is not the pa framework)☆13Dec 24, 2018Updated 7 years ago