freecores / nova

Related projects ⓘ

Alternatives and complementary repositories for nova

• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 8 years ago
• chiggs / oc_jpegencode
  Fork of OpenCores jpegencode with Cocotb testbench
  ☆42Updated 9 years ago
• Elphel / x393_sata
  mirror of https://git.elphel.com/Elphel/x393_sata
  ☆33Updated 4 years ago
• freecores / video_systems
  Video compression systems
  ☆20Updated 10 years ago
• jdocampom / JPEG-Decoder
  Verilog Code for a JPEG Decoder
  ☆31Updated 6 years ago
• ultraembedded / core_jpeg_decoder
  HW JPEG decoder wrapper with AXI-4 DMA
  ☆32Updated 4 years ago
• aomtoku / hdmi-ts
  hdmi-ts Project
  ☆13Updated 7 years ago
• freecores / video_stream_scaler
  Video Stream Scaler
  ☆40Updated 10 years ago
• iammituraj / FIFOs
  Register-based and RAM-based FIFOs designed in Verilog/System Verilog.
  ☆14Updated 3 months ago
• RoaLogic / Hamming-ECC
  Hamming ECC Encoder and Decoder to protect memories
  ☆28Updated last month
• sh-vlad / FPGA_rtime_HDR_video
  We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.
  ☆31Updated 5 years ago
• corundum / verilog-ethernet
  Verilog Ethernet components for FPGA implementation
  ☆14Updated last year
• myriadrf / LimeSDR-PCIe_GW
  Altera Cyclone IV FPGA project for the PCIe LimeSDR board
  ☆36Updated 2 years ago
• antmicro / openssd-nvme
  ☆13Updated 3 years ago
• CospanDesign / vivado-ip-cores
  IP Cores that can be used within Vivado
  ☆24Updated 3 years ago
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆21Updated 6 years ago
• FDU-ME-ARC / NVMeCHA
  ☆12Updated 3 years ago
• pbridd / lzrw1-compression-core
  This is the repository for a verilog implementation of a lzrw1 compression core
  ☆18Updated 6 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆24Updated 3 years ago
• FeldmeierMichael / MIPI_CSI_2
  ☆13Updated last year
• forconesi / nfmac10g
  Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC
  ☆61Updated 7 years ago
• freecores / wb_dma
  WISHBONE DMA/Bridge IP Core
  ☆18Updated 10 years ago
• racerxdl / LVDS-7-to-1-Serializer
  An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.
  ☆47Updated 10 years ago
• strezh / XPDMA
  PCIe DMA Subsystem based on Xilinx XAPP1171
  ☆45Updated last year
• themathgeek13 / jpeg_fpga
  Implementation of JPEG Compression on an FPGA
  ☆16Updated 7 years ago
• Bucknalla / ip_cores
  Verilog IP Cores & Tests
  ☆11Updated 6 years ago
• freecores / usbhostslave
  USB 1.1 Host and Function IP core
  ☆19Updated 10 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆54Updated last year
• rbarzic / nanorv32
  A small 32-bit implementation of the RISC-V architecture
  ☆32Updated 4 years ago
• ultraembedded / core_usb_bridge
  USB -> AXI Debug Bridge
  ☆35Updated 3 years ago