SERDES-based TDC core for Spartan-6
☆19Aug 2, 2012Updated 13 years ago
Alternatives and similar repositories for serdes-tdc
Users that are interested in serdes-tdc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Verilog implementation of a tapped delay line TDC☆48Sep 27, 2018Updated 7 years ago
- Implementation of tappped delay line TDC on FPGA☆14Dec 28, 2022Updated 3 years ago
- A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs☆70Feb 1, 2015Updated 11 years ago
- A Time to Digital Converter (TDC) on a Xilinx Virtex 5 FPGA.☆23Jul 15, 2017Updated 8 years ago
- ☆13Aug 25, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- FPGA based 30ps RMS TDCs☆91Mar 18, 2018Updated 8 years ago
- a fast multiplier implement using verilog☆13Dec 23, 2014Updated 11 years ago
- A reproduction of the Broadcom PCI/PCIe SDK.☆23Mar 21, 2024Updated 2 years ago
- OpenGL-like graphics pipeline on a Xilinx FPGA☆34Dec 14, 2010Updated 15 years ago
- Arduino library for the Texas Instruments TDC7200 Time-to-Digital Converter for Time-of-Flight Applications in LIDAR, Magnetostrictive an…☆21Mar 10, 2018Updated 8 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆71Sep 14, 2021Updated 4 years ago
- A place to store the code for FPGA tutorial projects I have written for the Parallella [http://parallellagram.org]☆11Oct 19, 2014Updated 11 years ago
- 4 channel 1GS/s DDS (AD9910 or AD9912 variant)☆17Jul 7, 2025Updated 8 months ago
- GitHub-based statistics highlighting interesting facts about the HDL industry☆12Jul 6, 2023Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- How to design a MIPI CSI interface with Efinix Trion FPGA T20F169 QUICKLY☆10Feb 6, 2020Updated 6 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆74Jun 16, 2022Updated 3 years ago
- IOb_SoC version of the Picorv32 RISC-V Verilog IP core☆14Dec 22, 2025Updated 3 months ago
- This code provides an easy way to simulate TCSPC image data which includes effect of the IRF, background after-pulsing and laser repetiti…☆11Apr 21, 2022Updated 3 years ago
- Port of Amber ARM Core project to Marsohod2 platform☆13Dec 4, 2019Updated 6 years ago
- include hdlc (miao), 422 grapher, 1553b☆21Oct 10, 2019Updated 6 years ago
- A new CASPER toolflow based on an HDL primitives library☆17Apr 11, 2012Updated 13 years ago
- Time-correlated single photon counting (TCSPC) data analysis☆10Jun 15, 2025Updated 9 months ago
- Example of Test Driven Design with VUnit☆16Nov 22, 2021Updated 4 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components☆47May 20, 2021Updated 4 years ago
- Baidu 100G Chasiss Switch hardware spec☆12Sep 20, 2017Updated 8 years ago
- Network Tap based on the ZedBoard and Ethernet FMC☆15Mar 13, 2026Updated 2 weeks ago
- Granite SDK Texture Extractor (.gtp/gts).☆23Aug 1, 2025Updated 7 months ago
- FPGA development platform for high-performance RF and digital design☆32Dec 3, 2015Updated 10 years ago
- Identifies ASL Hand Gesture for numbers using image processing in verilog☆14May 3, 2012Updated 13 years ago
- Finding the bacteria in rotting FPGA designs.☆14Dec 28, 2020Updated 5 years ago
- RISC-V instruction set CPUs in HardCaml☆15Sep 20, 2016Updated 9 years ago
- Is a collection of NULL Convention Logic (NCL) circuits and libraries written in Verilog to provide the experience of logically determine…☆15Jun 15, 2016Updated 9 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- Async-Karin is an asynchronous framework for FPGA written in Verilog. It has been tested on a Xilinx Artix-7 board and an Altera Cyclone-…☆30Dec 14, 2020Updated 5 years ago
- Design and Verification of a Complete Application Specific Integrated Circuit☆12Nov 21, 2016Updated 9 years ago
- Binary to ROOT Tree Converter.☆11Nov 29, 2018Updated 7 years ago
- H.264/AVC Baseline Decoder☆16Jul 17, 2014Updated 11 years ago
- YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…☆46Dec 4, 2024Updated last year
- 国产IC联盟,旨在收集一些进口芯片的国产替代方案,帮助开发者在最低转换成本的前提下,可靠快速地进行方案切换,以应对成本日益渐增的进口芯片。☆10Aug 15, 2020Updated 5 years ago
- openMSP430 CPU core (from OpenCores)☆22Oct 14, 2022Updated 3 years ago