Chinese Guide for Alveo Getting Started
☆13May 18, 2020Updated 6 years ago
Alternatives and similar repositories for Alveo_Chinese
Users that are interested in Alveo_Chinese are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Updated version of the XUP Workshops☆19Aug 10, 2018Updated 8 years ago
- ☆10Sep 12, 2025Updated last year
- Bring FPGA accelerators as a resources available through Docker containers for the OpenStack users.☆15Nov 7, 2022Updated 3 years ago
- ☆15Aug 14, 2023Updated 3 years ago
- 2021 Xilinx China Winter Camp☆11Mar 12, 2021Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- "mmult" example using SDSoC for PYNQ board☆12Feb 23, 2017Updated 9 years ago
- ☆25Dec 3, 2021Updated 4 years ago
- Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development☆13Mar 16, 2018Updated 8 years ago
- ☆30Mar 19, 2019Updated 7 years ago
- DeepEverest: a system for efficient DNN interpretation.☆13Jan 22, 2024Updated 2 years ago
- 包含课程PPT、经典强化学习算法代码以及近年强化学习论文复现☆21Jan 13, 2026Updated 9 months ago
- A simple MIPS-like CPU demo in C++ for Xilinx Vivado HLS☆20Jul 17, 2019Updated 7 years ago
- An HLS based winograd systolic CNN accelerator☆54Jul 18, 2021Updated 5 years ago
- The solution of the third prize of FPGA track in 2020 Low-Power Computer Vision Challenge☆10Aug 20, 2020Updated 6 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.☆31Apr 28, 2020Updated 6 years ago
- How to design a MIPI CSI interface with Efinix Trion FPGA T20F169 QUICKLY☆10Feb 6, 2020Updated 6 years ago
- Converting ss/vmess to clash proxies☆10May 19, 2022Updated 4 years ago
- Accelerating a DCNN (VGG16) with an FPGA by implementing GEMM convolutional Kernel on AWS F1 FPGA and integrate into Pytorch using C++ ex…☆10Jul 12, 2021Updated 5 years ago
- ☆10Aug 10, 2024Updated 2 years ago
- ☆12May 24, 2019Updated 7 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆33May 30, 2019Updated 7 years ago
- Stencil with Optimized Dataflow Architecture Compiler☆17May 4, 2020Updated 6 years ago
- NVMe-oF for Windows.☆15Feb 4, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- a general-purpose machine learning-driven auto-tuner for heterogeneous platforms☆10Sep 7, 2024Updated 2 years ago
- UCSD Sizer for leakage/dynamic power recovery, timing recovery☆18Mar 5, 2019Updated 7 years ago
- A Dataflow library for graph analytics acceleration☆14Dec 15, 2015Updated 10 years ago
- ☆12Apr 15, 2024Updated 2 years ago
- ☆14Feb 7, 2020Updated 6 years ago
- FPGA1394 V3 PCB Design☆14Feb 24, 2025Updated last year
- Codes of the paper Deformable Butterfly: A Highly Structured and Sparse Linear Transform.☆16Nov 1, 2021Updated 5 years ago
- skill:拼豆图纸生成器(pindou-perlerBeads-skill) 把任何图片变成可以照着拼的**拼豆图纸**,并附上**买豆子的购物清单**。 你只需要对 AI 助手说一句话,比如: > "把 test.png 做成 48×48 的拼豆图纸,用盼盼色号"…☆33Aug 16, 2026Updated 2 months ago
- ☆15Oct 24, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆11Dec 16, 2021Updated 4 years ago
- ☆12Jan 21, 2021Updated 5 years ago
- 自然语言处理与智能搜索☆10May 10, 2019Updated 7 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆50Nov 18, 2024Updated last year
- simple demo hardware code for implement access to ST7789 LCD display from FPGA☆11Mar 28, 2022Updated 4 years ago
- Package Xilinx FPGA tools into docker containers, useful for CI situations.☆17Oct 20, 2014Updated 12 years ago
- 100G Udp Link For axi Stream☆17Jun 27, 2023Updated 3 years ago