Max-Gulda / Cordic-MathLinks
Cordic fixed point math
☆18Updated last year
Alternatives and similar repositories for Cordic-Math
Users that are interested in Cordic-Math are comparing it to the libraries listed below
Sorting:
- A digital phase-locked loop implemented on Spartan-6☆13Updated 7 years ago
- ☆11Updated 10 years ago
- ☆21Updated 10 years ago
- Robotic Application Processor☆23Updated 3 years ago
- Open-BLDC brushless motor C simulator☆23Updated 13 years ago
- GoAI 2.0 Public Repository☆25Updated 3 years ago
- Phase locked loop algorithm implemented for grid synchronization.☆24Updated 3 years ago
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆31Updated 8 years ago
- FPGA version of CORDIC algorithm that evaluates all the trigonometric and anti-trigonometric functions.☆23Updated 5 years ago
- digital signal processing FIR filter implimentation in microcontroller☆18Updated 6 years ago
- FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface☆19Updated 2 years ago
- CherryMP is a tiny block memory pool based on CherryRB, support nonos or os(but we suggest you use in os)☆15Updated 3 months ago
- Colorspace conversion, gamma correction, and more -- all integrated within a MIPI-to-HDMI pipeline in FPGA.☆30Updated 5 years ago
- FPGA SDR platform: AD9963 + XC6SLX9 + CY7C68013☆17Updated 11 years ago
- Simple mono FM Radio.☆48Updated 9 years ago
- Verilog library of EPC Gen-2 RFID Tag Baseband Processor for IC and FPGA designers☆36Updated 3 years ago
- This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals☆27Updated 2 years ago
- 软件无线电,使用FPGA进行正交解调。☆22Updated 6 years ago
- 2023全国大学生电子设计大赛(电赛)A题,并联并网逆变器☆17Updated 9 months ago
- Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)☆30Updated 5 years ago
- 4-Layer XC7Z010 DDR3 Layout☆18Updated 3 years ago
- A project demonstrate how to config ad9361 to TX mode☆11Updated 6 years ago
- A general implementation of a FFT, FIR and IIR filters and some other General Functions in a TMS320C5535 ezdsp including FFT and FIR, IIR…☆20Updated 9 years ago
- Hardware description (VHDL) and configuration scripts (Python) of a versatile IIR Filter implemented as cascaded SOS/biquads. No vendor-s…☆21Updated 7 years ago
- Video and Image Processing☆40Updated 4 years ago
- 有疑问请联系:1873535224@qq.com。本项目为电赛指定开发板TI-MSPM0G3507工程模板文件。 主要功能是:使用KIEL5+VSCODE配合嵌入式操作系统(FreeRTOS/RT-Thread)优雅的开 发TI-MSPM0G3507单片机 项目内容包括: (…☆19Updated 3 months ago
- IEEE 802.16 OFDM-based transceiver system☆27Updated 6 years ago
- Communication channel from FPGA (Alterra EP4CE10) and Linux (Lichee PI Allwinner V3S)☆29Updated 5 years ago
- Open Hardware carrier board supporting modules with Zynq 7000 All Programmable SoC devices.☆60Updated 2 years ago
- A usb FPGA board based Logic analyzer (逻辑分析仪)☆17Updated 2 years ago