jar-ben / mustool
☆15Updated last year
Alternatives and similar repositories for mustool:
Users that are interested in mustool are comparing it to the libraries listed below
- Random Generator of Btor2 Files☆10Updated last year
- ☆12Updated 7 years ago
- Tools for manipulating CHC and related files☆14Updated 2 years ago
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission☆11Updated 7 months ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆11Updated last month
- Bit-bLAsting solving Non-linear integer constraints.☆21Updated 9 months ago
- ☆15Updated 2 years ago
- ☆34Updated 9 months ago
- LinearArbitrary-SeaHorn is a CHC solver for LLVM-based languages.☆21Updated 2 years ago
- A model-based API Fuzzer for SMT Solvers.☆14Updated 3 weeks ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆10Updated 10 months ago
- py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).☆43Updated 4 months ago
- BuDDy BDD package (with CMake support)☆12Updated 11 months ago
- Python version of tools to work with AIG formatted files☆11Updated 11 months ago
- A framework to ease parallelization of sequential SAT solvers☆18Updated last month
- A fast and certifying solver for quantified Boolean formulas.☆27Updated last week
- BTOR2 MLIR project☆25Updated last year
- Collection for submission (Hardware Model Checking Benchmark)☆9Updated 6 months ago
- ☆12Updated 2 years ago
- Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification☆14Updated 5 months ago
- The Standard Interface for Incremental Satisfiability Solving☆49Updated 2 years ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆25Updated 2 years ago
- ☆16Updated last year
- A hardware model checker for hyperproperties☆18Updated 10 months ago
- A Fast Floating-Point Satisfiability Solver☆28Updated 6 years ago
- A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core☆12Updated 5 years ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆29Updated 9 months ago
- A continuous local search SAT solver based on Fourier expansion for hybrid Boolean constraints.☆12Updated 7 months ago
- ☆16Updated 3 years ago
- A generic parser and tool package for the BTOR2 format.☆41Updated 4 months ago