☆48Apr 29, 2026Updated last week
Alternatives and similar repositories for i3c-core
Users that are interested in i3c-core are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- HW Design Collateral for Caliptra Subsystem, which comprises Caliptra RoT IP and additional manufacturer controls.☆40Apr 29, 2026Updated last week
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆133May 8, 2020Updated 5 years ago
- ☆30Jul 9, 2025Updated 9 months ago
- ☆17Sep 9, 2024Updated last year
- Verification IP project for I3C protocol☆27Feb 13, 2026Updated 2 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- FPGA-driven memory tester for SO-DIMM DDR5 memory sticks☆32Dec 11, 2025Updated 4 months ago
- 📕 A book about Algorithms and Data Structures (PL)☆17Aug 8, 2024Updated last year
- ☆14Jul 5, 2019Updated 6 years ago
- Hamming ECC Encoder and Decoder to protect memories☆35Jan 28, 2025Updated last year
- RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS☆13Aug 26, 2024Updated last year
- IO expansion board compatible with Digilent Arty A7☆11Aug 7, 2023Updated 2 years ago
- Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device☆23Jul 7, 2024Updated last year
- A light-weight hardware oriented synchronous stream cipher.☆12Mar 19, 2022Updated 4 years ago
- GPU for OENG1167 in Verilog HDL for DE10 series boards☆15Nov 1, 2020Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- VeriPy is a python based Verilog/Systemverilog automation tool. It automates ports/wire/reg/logic declarations, sub-module Instantiation,…☆37Apr 15, 2026Updated 3 weeks ago
- Cryptography accelerator core (for AES128/AES256 and SHA256) designed in Chisel3, primarily targeting ASIC platforms.☆10Jan 11, 2021Updated 5 years ago
- PCI Express ® Base Specification Revision 3.0☆13May 23, 2018Updated 7 years ago
- ☆27Jan 5, 2026Updated 4 months ago
- Raw image/video data analyzer☆49Jan 29, 2025Updated last year
- STM32F429 with OV7670 through DCMI on 800x600 LCD☆10Feb 15, 2017Updated 9 years ago
- ☆20Updated this week
- A simple JavaScript to upload a file to Google Drive and set its mimeType☆11Feb 9, 2020Updated 6 years ago
- Verilog Code for I2C Protocol☆19Nov 12, 2020Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- DCMI testing with STM32F429-DISCOVERY and OV9655 camera☆15Apr 15, 2016Updated 10 years ago
- whatever it means☆16Apr 1, 2026Updated last month
- an attempt to implement CRYSTALS-Kyber PQC to Verilog☆12Jan 9, 2025Updated last year
- It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.☆20Jan 30, 2020Updated 6 years ago
- ☆19Mar 19, 2026Updated last month
- ☆14Jun 7, 2021Updated 4 years ago
- RISC-V Vector (RVV) Automatic Tests Generator with full instructions coverage, including self-checking test and signature test (RISC-V Co…☆16Apr 3, 2024Updated 2 years ago
- ☆14Sep 27, 2022Updated 3 years ago
- ☆19Apr 28, 2026Updated last week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- End-to-End Open-Source I2C GPIO Expander☆44Mar 22, 2026Updated last month
- Package manager and build system for VHDL, Verilog, and SystemVerilog☆65Apr 22, 2026Updated 2 weeks ago
- A Python package for generating HDL wrappers and top modules for HDL sources☆73Updated this week
- SDN Controller Test (ONOS, OpenDaylight, RouteFlow, OpenStack-Neutron+ODL, and Etc.....)☆11Aug 29, 2025Updated 8 months ago
- ☆84Apr 28, 2026Updated last week
- Verification Template Engine is a Jinja2-based template engine targeted at verification engineers☆14Jan 4, 2024Updated 2 years ago
- OBI SystemVerilog synthesizable interconnect IPs for on-chip communication☆20Jan 9, 2026Updated 3 months ago