Shashi18 / I2C-VerilogLinks
Verilog Code for I2C Protocol
☆19Updated 4 years ago
Alternatives and similar repositories for I2C-Verilog
Users that are interested in I2C-Verilog are comparing it to the libraries listed below
Sorting:
- ☆49Updated 4 years ago
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆98Updated 2 years ago
- Asynchronous fifo in verilog☆35Updated 9 years ago
- System Verilog using Functional Verification☆12Updated last year
- PCIE 5.0 Graduation project (Verification Team)☆80Updated last year
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆65Updated 3 years ago
- Master and Slave made using AMBA AXI4 Lite protocol.☆30Updated 5 years ago
- Architectural design of data router in verilog☆31Updated 5 years ago
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆24Updated 2 years ago
- Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.☆55Updated 5 years ago
- This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim to…☆19Updated 2 years ago
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆28Updated last month
- AXI Interconnect☆53Updated 4 years ago
- Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀☆36Updated last year
- Verification IP for APB protocol☆70Updated 4 years ago
- 100DaysofRTL & System Verilog design: basic logic gates, mux, half/full subtractor, Encoder, D flipflop, 8 bit counter, LFSR, Custom Coun…☆35Updated 2 years ago
- UVM Testbench to verify serial transmission of data between SPI master and slave☆51Updated 5 years ago
- UART design in SV and verification using UVM and SV☆49Updated 5 years ago
- DDR2 memory controller written in Verilog☆78Updated 13 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆132Updated 4 years ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆26Updated 3 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆86Updated last year
- An uvm verification env for ahb2apb bridge☆56Updated 4 years ago
- ☆16Updated last year
- Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL☆119Updated 3 years ago
- SPI interface connect to APB BUS with Verilog HDL☆37Updated 4 years ago
- Verification IP for I2C protocol☆49Updated 4 years ago
- UVM based Verification of SPI_Protocol. A Serial intra System Communication Peripheral Protocol.☆10Updated last year
- Asynchronous fifo using verilog and testbench using system verilog. For asynchronous Fifo design in different module.☆40Updated 4 years ago
- The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with a …☆17Updated 4 years ago