Verilog Code for I2C Protocol
☆19Nov 12, 2020Updated 5 years ago
Alternatives and similar repositories for I2C-Verilog
Users that are interested in I2C-Verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.☆14Jul 28, 2021Updated 4 years ago
- Asynchronous fifo in verilog☆38Mar 20, 2016Updated 10 years ago
- Verilog I2C Slave☆26Aug 11, 2014Updated 11 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Feb 25, 2019Updated 7 years ago
- It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.☆20Jan 30, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Simple implementation of I2C interface written on Verilog and SystemC☆49Aug 26, 2017Updated 8 years ago
- An i2c master controller implemented in Verilog☆34Jul 26, 2017Updated 8 years ago
- I2C slave Verilog Design and TestBench☆27May 9, 2019Updated 7 years ago
- I2S transciever implemented in Verilog HDL☆33Oct 11, 2017Updated 8 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆80Oct 7, 2022Updated 3 years ago
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS☆13Aug 26, 2024Updated last year
- Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device☆23Jul 7, 2024Updated last year
- Verilog module for I2C Master, up to 16 bit sub addr, 7bit slave address, and multiple byte read/write capable☆27Mar 3, 2026Updated 2 months ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- This is a Multi master Multi slave compatible system bus design modeled using verilog. This is much like AMBA AHB Specification☆31Jan 6, 2020Updated 6 years ago
- ☆19Oct 20, 2025Updated 7 months ago
- I2C Master and Slave☆39Jul 15, 2015Updated 10 years ago
- Compressed Sensing and Kalman Filter Based Channel Tracking for mmWave Massive MIMO Systems☆15Apr 24, 2024Updated 2 years ago
- Simulation files for Topics in Wireless Communications.☆15May 24, 2020Updated 6 years ago
- opensource EDA tool flor VLSI design☆37Sep 17, 2023Updated 2 years ago
- hdmi-ts Project☆13Jun 11, 2017Updated 8 years ago
- MatLab scripts used to generate the results illustrated in paper: "Massive Wireless Energy Transfer: Enabling Sustainable IoT Towards 6G …☆12Oct 4, 2021Updated 4 years ago
- Channel Estimation and Performance Evaluation of Multi-IRS Aided MIMO Communication System☆13Oct 16, 2021Updated 4 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆14Apr 1, 2020Updated 6 years ago
- Verification IP project for I3C protocol☆28Feb 13, 2026Updated 3 months ago
- Router 1 x 3 verilog implementation☆15Sep 5, 2021Updated 4 years ago
- HDMI + GPU-pipeline + FFT☆14Mar 4, 2016Updated 10 years ago
- Advanced Peripheral Bus (APB) UVM testbench project☆10Apr 9, 2017Updated 9 years ago
- FIR band-pass filter using Verilog HDL.☆13Sep 6, 2020Updated 5 years ago
- Codes for reproducing the numerical results reported in: "Low-Complexity Distributed XL-MIMO for Multiuser Detection" by Victor Croisfelt…☆17Aug 29, 2024Updated last year
- hardware implement of huffman coding(written in verilog)☆14Jul 30, 2017Updated 8 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆11Aug 15, 2020Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs☆21Dec 15, 2019Updated 6 years ago
- web scraping with C#,HtmlAgilitypack,HttpClient library☆10Feb 18, 2018Updated 8 years ago
- I2C controller core☆51Jan 1, 2023Updated 3 years ago
- End-to-End Open-Source I2C GPIO Expander☆44Mar 22, 2026Updated 2 months ago
- MatLab scripts used to generate the results illustrated in paper: "A Low-Complexity Beamforming Design for Multiuser Wireless Energy Tran…☆18Oct 5, 2021Updated 4 years ago
- MATLAB codes for "FDD massive MIMO channel estimation with arbitrary 2D-array geometry"☆15Nov 15, 2022Updated 3 years ago
- fpga i2c slave verilog hdl rtl☆16Nov 26, 2015Updated 10 years ago