MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
☆135May 8, 2020Updated 6 years ago
Alternatives and similar repositories for i3c-slave-design
Users that are interested in i3c-slave-design are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.☆20Jan 30, 2020Updated 6 years ago
- Verification IP project for I3C protocol☆28May 28, 2026Updated 2 months ago
- Verification IP for I2C protocol☆52Sep 22, 2021Updated 4 years ago
- ☆54Updated this week
- ☆20Jun 18, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- APB to I2C☆44Jul 17, 2014Updated 12 years ago
- verification of simple axi-based cache☆19May 14, 2019Updated 7 years ago
- Verilog I2C interface for FPGA implementation☆717Feb 27, 2025Updated last year
- AXI DMA Check: A utility to measure DMA speeds in simulation☆16Jan 22, 2025Updated last year
- Implementation of the SHA256 Algorithm in Verilog☆39Jan 2, 2012Updated 14 years ago
- SystemVerilog Logger☆19Apr 6, 2026Updated 4 months ago
- Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA☆76Jun 22, 2020Updated 6 years ago
- ☆76Jul 30, 2021Updated 5 years ago
- Translates IPXACT XML to synthesizable VHDL or SystemVerilog☆64Jan 28, 2026Updated 6 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆14Jul 16, 2026Updated last month
- MIPI CSI-2 + MIPI CCS Demo☆79May 27, 2021Updated 5 years ago
- AMBA 3 AHB UVM TB☆35Mar 21, 2019Updated 7 years ago
- AXI3 Bus Functional Models (Initiator & Target)☆29Dec 26, 2022Updated 3 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- MIAOW2.0 FPGA implementable design☆12Oct 18, 2017Updated 8 years ago
- Parametric GPIO Peripheral☆13Jan 30, 2025Updated last year
- AMBA AHB 2.0 VIP in SystemVerilog UVM☆162Mar 31, 2020Updated 6 years ago
- Novel GUI Based UVM Testbench Template Builder☆156Apr 14, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- AMBA bus lecture material☆548Jan 21, 2020Updated 6 years ago
- PCIE 5.0 Graduation project (Verification Team)☆108Jan 27, 2024Updated 2 years ago
- ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)☆13Aug 29, 2018Updated 7 years ago
- ☆38Mar 10, 2021Updated 5 years ago
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated last year
- Various HDL (Verilog) IP Cores☆930Jul 1, 2021Updated 5 years ago
- A Verilog implementation of DisplayPort protocol for FPGAs☆274Mar 15, 2019Updated 7 years ago
- MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…☆69Feb 13, 2025Updated last year
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Dec 9, 2020Updated 5 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Altera Cyclone IV FPGA project for the PCIe LimeSDR board☆42Nov 3, 2022Updated 3 years ago
- 正点原子开拓者&新起点FPGA开发板例程☆15Nov 29, 2019Updated 6 years ago
- HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…☆114Oct 31, 2023Updated 2 years ago
- Common SystemVerilog RTL modules for RgGen☆16Feb 5, 2026Updated 6 months ago
- AMBA AXI VIP☆472Jun 28, 2024Updated 2 years ago
- AHB to APB Bridge VIP☆30Mar 4, 2019Updated 7 years ago
- A Xtext based SystemRDL editor with syntax highlighting and context sensitive help☆12Feb 9, 2024Updated 2 years ago