thu-nics / UniNDP
Github repository of HPCA 2025 paper "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"
☆10Updated 5 months ago
Alternatives and similar repositories for UniNDP:
Users that are interested in UniNDP are comparing it to the libraries listed below
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆52Updated this week
- ☆64Updated 10 months ago
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆17Updated 5 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆80Updated last week
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆80Updated 10 months ago
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆49Updated 8 months ago
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆84Updated last year
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆53Updated 4 months ago
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆29Updated last year
- Programming and Assignment Material for ECE 695☆15Updated 4 years ago
- EDA toolchain for processing-in-memory architectures, including an architecture synthesizer, a compiler, and a simulator☆12Updated 5 months ago
- ☆23Updated 5 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆67Updated last month
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆30Updated 4 months ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆36Updated 2 years ago
- ☆29Updated 4 months ago
- A Cycle-level simulator for M2NDP☆26Updated this week
- MICRO22 artifact evaluation for Sparseloop☆43Updated 2 years ago
- TileFlow is a performance analysis tool based on Timeloop for fusion dataflows☆58Updated last year
- ☆36Updated last year
- ☆138Updated 10 months ago
- ☆105Updated last week
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- [HPCA'24] Smart-Infinity: Fast Large Language Model Training using Near-Storage Processing on a Real System☆44Updated last year
- MAGIS: Memory Optimization via Coordinated Graph Transformation and Scheduling for DNN (ASPLOS'24)☆50Updated 11 months ago
- Tender: Accelerating Large Language Models via Tensor Decompostion and Runtime Requantization (ISCA'24)☆14Updated 10 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- A co-design architecture on sparse attention☆52Updated 3 years ago
- An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation☆44Updated last year
- ☆45Updated 3 years ago