CMU-SAFARI / pim-ml
PIM-ML is a benchmark for training machine learning algorithms on the UPMEM architecture, which is the first publicly-available real-world processing-in-memory (PIM) architecture. Described in the ISPASS 2023 paper by Gomez-Luna et al. (https://arxiv.org/pdf/2207.07886.pdf).
☆22Updated last month
Alternatives and similar repositories for pim-ml:
Users that are interested in pim-ml are comparing it to the libraries listed below
- STONNE Simulator integrated into SST Simulator☆17Updated 10 months ago
- A Cycle-level simulator for M2NDP☆23Updated 2 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆17Updated 2 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆32Updated 2 years ago
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆28Updated last year
- ☆24Updated last year
- GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing☆13Updated 2 years ago
- ☆25Updated 3 years ago
- ☆9Updated 2 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- Heterogenous ML accelerator☆17Updated 4 months ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆16Updated last year
- ☆23Updated 4 years ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆27Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆30Updated 3 years ago
- ☆13Updated last year
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆20Updated 6 years ago
- agile hardware-software co-design☆47Updated 3 years ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆45Updated 2 months ago
- PyGim is the first runtime framework to efficiently execute Graph Neural Networks (GNNs) on real Processing-in-Memory systems. It provide…☆19Updated 2 months ago
- NeuraChip Accelerator Simulator☆11Updated 9 months ago
- A graph linear algebra overlay☆51Updated last year
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆42Updated 6 months ago
- Heterogeneous simulator for DECADES Project☆31Updated 8 months ago
- A fast, accurate, and easy-to-integrate memory simulator that model memory system performance with bandwidth--latency curves.☆20Updated 2 months ago