Alternatives and similar repositories for micro2022tutorial

Users that are interested in micro2022tutorial are comparing it to the libraries listed below

• varunnagpaal / Digital-Hardware-Modelling
  Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
  ☆68Updated 10 months ago
• bojackchen / digital-flow
  This is a tutorial on standard digital design flow
  ☆82Updated 4 years ago
• akilm / Physical-Design
  Physical Design Flow from RTL to GDS using Opensource tools.
  ☆117Updated 5 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆114Updated 2 years ago
• openecos-projects / icsprout55-pdk
  55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.
  ☆153Updated last week
• taneroksuz / fpu
  IEEE 754 single and double precision floating point library in systemverilog and vhdl
  ☆73Updated last week
• zslwyuan / Basic-SIMD-Processor-Verilog-Tutorial
  Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in …
  ☆144Updated 3 years ago
• siliconcompiler / lambdapdk
  Library of open source Process Design Kits (PDKs)
  ☆64Updated this week
• brabect1 / sta_basics_course
  Introductory course into static timing analysis (STA).
  ☆99Updated 6 months ago
• UCLA-VAST / RapidStream
  [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.
  ☆127Updated 3 years ago
• bsc-loca / sauria
  SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…
  ☆77Updated last month
• StanfordAHA / garnet
  Next generation CGRA generator
  ☆118Updated last week
• chipsalliance / aib-phy-hardware
  Advanced Interface Bus (AIB) die-to-die hardware open source
  ☆144Updated last year
• mflowgen / freepdk-45nm
  ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
  ☆197Updated 5 years ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆72Updated last year
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆81Updated 4 years ago
• Weiyet / RTLStructLib
  RTL data structure
  ☆59Updated this week
• StanfordVLSI / dragonphy2
  Open Source PHY v2
  ☆32Updated last year
• pulp-platform / iDMA
  A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)
  ☆190Updated 3 months ago
• aolofsson / POSH
  ☆44Updated 5 years ago
• openhwgroup / cv-hpdcache
  RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
  ☆94Updated last month
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆46Updated 3 years ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆38Updated 2 years ago
• dian-lun-lin / RTLflow
  A GPU acceleration flow for RTL simulation with batch stimulus
  ☆116Updated last year
• pulp-platform / redmule
  ☆90Updated 2 weeks ago
• OpenTimer / Parser-Verilog
  A Standalone Structural Verilog Parser
  ☆99Updated 3 years ago
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆62Updated last year
• pkuzjx / eda-collection
  ☆108Updated 6 years ago
• Xilinx / fpga24_routing_contest
  Runtime-First FPGA Interchange Routing Contest @ FPGA’24
  ☆34Updated 7 months ago
• sheldonucr / ee260_lab
  EE 260 Winter 2017: Advanced VLSI Design
  ☆68Updated 9 years ago