Alternatives and similar repositories for pulseDetector

Users that are interested in pulseDetector are comparing it to the libraries listed below

• PyFPGA / pyfpga
  A Python package to use FPGA development tools programmatically.
  ☆143Updated 9 months ago
• efard / DSPHDL
  Digital Signal Processing and Well-Known Modulations on HDL
  ☆41Updated 7 months ago
• V0XNIHILI / parametrizable-floating-point-verilog
  Educational verilog library that supports IEEE754 floating point arithmetic with a parametrizable mantissa and exponent
  ☆30Updated 9 months ago
• Xilinx / Vitis_Model_Composer
  Vitis Model Composer Examples and Tutorials
  ☆113Updated 3 weeks ago
• Kobzon86 / Convolutional-Neural-Network-using-SystemVerilog
  Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )
  ☆65Updated last year
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆109Updated 2 years ago
• shariethernet / RPHAX
  RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…
  ☆21Updated 2 years ago
• rockyco / llm-fpga-design
  LLM-Aided FPGA Design and Debug Flow
  ☆20Updated 5 months ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆59Updated last year
• black-parrot-hdk / zynq-parrot
  BlackParrot on Zynq
  ☆47Updated 3 weeks ago
• PyFPGA / HDLconv
  HDL converter (between VHDL, SystemVerilog and/or Verilog), based on GHDL, Yosys, Synlig, and the plugins ghdl-yosys-plugin and yosys-sla…
  ☆25Updated 10 months ago
• Xilinx / RFSoC-PYNQ
  Python productivity for RFSoC platforms
  ☆85Updated 2 months ago
• themperek / cocotb-vivado
  Limited python / cocotb interface to Xilinx/AMD Vivado simulator.
  ☆71Updated 3 months ago
• JennySmith888 / 100GBE-PYNQ
  ☆19Updated 4 years ago
• kmkalpana2001 / DIGITAL-VLSI-SOC-DESIGN-AND-PLANNING
  ☆47Updated last year
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆25Updated 4 years ago
• TinyTapeout / tinytapeout-ihp-0p1
  Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process
  ☆19Updated 9 months ago
• cathalmccabe / PYNQ_tutorials
  ☆101Updated 2 years ago
• Xilinx / ZCU111-PYNQ
  Board files to build the ZCU111 PYNQ image
  ☆20Updated 3 years ago
• der-mur / book1-zynq-intro
  Resources for my first book
  ☆20Updated 2 years ago
• Learning-Chips-Lab / OpenEye
  The Open Source Hardware Accelerator for Efficient Neural Network Inference
  ☆48Updated this week
• Xilinx / PYNQ_Bootcamp
  PYNQ Bootcamp 2019-2024 teaching materials.
  ☆52Updated last year
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆129Updated 2 weeks ago
• Xilinx / Kria-PYNQ
  PYNQ support and examples for Kria SOMs
  ☆120Updated last year
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆79Updated 2 years ago
• ivanvig / 2dconv-FPGA
  A 2D convolution hardware implementation written in Verilog
  ☆51Updated 5 years ago
• MakarenaLabs / Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow
  Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.
  ☆31Updated 5 years ago
• ECASLab / cynq
  PYNQ bindings for C and C++ to avoid requiring Python or Vitis to execute hardware acceleration.
  ☆27Updated 2 weeks ago
• wyvernSemi / vproc
  Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments
  ☆69Updated 3 months ago
• Xilinx / DSP-PYNQ
  A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+
  ☆40Updated 3 years ago