The-OpenROAD-Project / PDNSim
Power grid analysis
☆19Updated 4 years ago
Alternatives and similar repositories for PDNSim:
Users that are interested in PDNSim are comparing it to the libraries listed below
- Macro placement tool for OpenROAD flow☆23Updated 4 years ago
- UCSD Sizer for leakage/dynamic power recovery, timing recovery☆18Updated 6 years ago
- DATC RDF☆49Updated 4 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆55Updated 2 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆54Updated 4 years ago
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆42Updated 2 months ago
- Public repository for Task 6 of OpenROAD project. ML-based PDN synthesis and optimization.☆33Updated last year
- UCSD Detailed Router☆84Updated 4 years ago
- ☆22Updated 4 years ago
- Global Router Built for ICCAD Contest 2019☆30Updated 5 years ago
- ☆30Updated 3 years ago
- Logic synthesis and ABC based optimization☆49Updated 2 weeks ago
- Collection of digital hardware modules & projects (benchmarks)☆51Updated 4 months ago
- A parallel global router using the Galois framework☆27Updated last year
- An analytical VLSI placer☆28Updated 3 years ago
- ☆29Updated 4 years ago
- Open Source Detailed Placement engine☆11Updated 5 years ago
- ☆43Updated 11 months ago
- Open Source Detailed Placement engine☆36Updated 5 years ago
- Annealing-based PCB placement tool☆36Updated 4 years ago
- VLSI EDA Global Router☆71Updated 7 years ago
- OpenDesign Flow Database☆16Updated 6 years ago
- DATC Robust Design Flow.☆37Updated 5 years ago
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆90Updated 5 years ago
- IDEA project source files☆104Updated 4 months ago
- ☆25Updated 11 months ago
- ☆29Updated last year
- ☆25Updated 2 years ago
- IO and Pin Placer for Floorplan-Placement Subflow☆22Updated 4 years ago