Alternatives and similar repositories for kleine-riscv

Users that are interested in kleine-riscv are comparing it to the libraries listed below

• Ashwin-Rajesh / RiSC-16
  RiSC 16 is a simple 16 bit instruction set with 8 instructions and 3 instruction formats. This is an RTL implementation in verilog, instr…
  ☆12Updated 3 years ago
• mikeakohn / riscv_fpga
  Implementation of a RISC-V CPU in Verilog.
  ☆17Updated 8 months ago
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆34Updated 2 years ago
• dan-rodrigues / pico-hx
  PCB combining Raspberry Pi Pico and iCE40 FPGA
  ☆31Updated last year
• Wren6991 / ChristmasSoC
  Dual-core RISC-V SoC with JTAG, atomics, SDRAM
  ☆25Updated 3 years ago
• aniketnk / circular-queue-verilog
  Implementation of a circular queue in hardware using verilog.
  ☆17Updated 6 years ago
• lawrie / blackicemxbook
  ☆27Updated 6 years ago
• ironsteel / nes_ecp5
  NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board
  ☆38Updated 3 years ago
• ulixxe / usb_dfu
  Full Speed USB DFU interface for FPGA and ASIC designs
  ☆20Updated last year
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆42Updated 3 years ago
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆61Updated 2 years ago
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆17Updated 5 years ago
• zeeshanrafique23 / RV32I-Logisim
  RV32I single cycle simulation on open-source software Logisim.
  ☆20Updated 3 years ago
• VHDPlus / VHDPlus_Libraries_and_Examples
  This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…
  ☆20Updated last year
• pulp-platform / RVfplib
  Optimized RISC-V FP emulation for 32-bit processors
  ☆36Updated 4 years ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 4 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆48Updated 9 months ago
• taneroksuz / fpu-sp
  IEEE 754 single precision floating point library in systemverilog and vhdl
  ☆38Updated 11 months ago
• mattvenn / wishbone_buttons_leds
  simple wishbone client to read buttons and write leds
  ☆19Updated last year
• umenthum / frizzle
  A RISC-V system simulator with VGA, UART, memory, and JTAG debugging, interconnected with SystemC/TLM, designed with operating systems an…
  ☆13Updated 5 years ago
• lawrie / ulx3s_cores
  Information on cores available on the Ulx3s ECP5 FPGA board
  ☆14Updated 5 years ago
• ultraembedded / librtos
  Very basic real time operating system for embedded systems...
  ☆16Updated 5 years ago
• ZipCPU / qoiimg
  Quite OK image compression Verilog implementation
  ☆22Updated 11 months ago
• tomverbeure / jtag_uart_example
  Mini CPU design with JTAG UART support
  ☆20Updated 4 years ago
• b-dmitry1 / V188
  FPGA 80186 IBM PC compatible system for Altera Cyclone IV (EP4CE15F23/EP4CE55F23)
  ☆23Updated 3 years ago
• steveicarus / simbus
  Icarus SIMBUS
  ☆20Updated 6 years ago
• AntonMause / rv16poc
  16 bit RISC-V proof of concept
  ☆24Updated last month
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆55Updated 8 months ago
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆31Updated 5 years ago
• mkvenkit / humble_ice
  A low cost FPGA development board based on Lattice iCE40UP5k and Raspberry Pi RP2040.
  ☆45Updated 3 years ago