SymbiFlow / yosysLinks
SymbiFlow WIP changes for Yosys Open SYnthesis Suite
☆39Updated last year
Alternatives and similar repositories for yosys
Users that are interested in yosys are comparing it to the libraries listed below
Sorting:
- Project X-Ray Database: XC7 Series☆70Updated 3 years ago
- VHDL library 4 FPGAs☆181Updated this week
- nextpnr portable FPGA place and route tool☆20Updated last year
- Test of the USB3 IP Core from Daisho on a Xilinx device☆98Updated 5 years ago
- CoreScore☆163Updated last month
- Small footprint and configurable embedded FPGA logic analyzer☆187Updated 3 months ago
- Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.☆81Updated 3 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆66Updated last week
- A utility for Composing FPGA designs from Peripherals☆184Updated 8 months ago
- Ultimate ECP5 development board☆111Updated 6 years ago
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆91Updated 10 months ago
- An Open Source configuration of the Arty platform☆132Updated last year
- Board definitions for Amaranth HDL☆118Updated 3 weeks ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated 2 months ago
- Virtual Development Board☆61Updated 3 years ago
- Documenting Lattice's 28nm FPGA parts☆144Updated last year
- PicoRV☆44Updated 5 years ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)☆34Updated 3 years ago
- This repository contains small example designs that can be used with the open source icestorm flow.☆149Updated 3 years ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated last year
- FPGA USB stack written in LiteX☆129Updated 3 years ago
- A tiny POWER Open ISA soft processor written in Chisel☆110Updated 2 years ago
- System on Chip toolkit for Amaranth HDL☆92Updated 11 months ago
- Small footprint and configurable SPI core☆42Updated last week
- An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!☆219Updated 3 years ago
- Example LED blinking project for your FPGA dev board of choice☆184Updated last week
- FuseSoC standard core library☆147Updated 3 months ago
- Using VexRiscv without installing Scala☆38Updated 3 years ago
- Experiments with Yosys cxxrtl backend☆49Updated 8 months ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆178Updated last year