Alternatives and similar repositories for nextpnr

Users that are interested in nextpnr are comparing it to the libraries listed below

• chipsalliance / fasm
  FPGA Assembly (FASM) Parser and Generator
  ☆97Updated 3 years ago
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆147Updated 5 months ago
• f4pga / icestorm
  Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
  ☆34Updated 3 years ago
• SymbiFlow / yosys
  SymbiFlow WIP changes for Yosys Open SYnthesis Suite
  ☆39Updated last year
• SymbioticEDA / MARLANN
  Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
  ☆91Updated 6 years ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆68Updated last month
• olofk / subservient
  Small SERV-based SoC primarily for OpenMPW tapeout
  ☆48Updated 4 months ago
• f4pga / prjuray
  Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
  ☆80Updated 3 years ago
• YosysHQ / yosys-bigsim
  A collection of big designs to run post-synthesis simulations with yosys
  ☆49Updated 10 years ago
• FPGA-Research / byteman
  Bitstream relocation and manipulation tool.
  ☆47Updated 2 years ago
• rubund / graywolf
  ☆112Updated 4 years ago
• clairexen / picorv
  PicoRV
  ☆43Updated 5 years ago
• siliconcompiler / zerosoc
  Demo SoC for SiliconCompiler.
  ☆62Updated 3 weeks ago
• chipsalliance / fpga-interchange-schema
  ☆56Updated 3 years ago
• chipsalliance / yosys-f4pga-plugins
  Plugins for Yosys developed as part of the F4PGA project.
  ☆83Updated last year
• pulp-platform / bigpulp
  ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
  ☆50Updated 3 years ago
• YosysHQ / yosys-bench
  Benchmarks for Yosys development
  ☆24Updated 5 years ago
• chipsalliance / fpga-tool-perf
  FPGA tool performance profiling
  ☆102Updated last year
• enjoy-digital / litex_vexriscv_smp_test
  VexRiscv-SMP integration test with LiteX.
  ☆26Updated 4 years ago
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆71Updated 3 years ago
• lnis-uofu / SOFA
  SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA
  ☆142Updated 2 years ago
• YosysHQ / mcy
  Mutation Cover with Yosys (MCY)
  ☆88Updated 2 weeks ago
• antonblanchard / chiselwatt
  A tiny POWER Open ISA soft processor written in Chisel
  ☆111Updated 2 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆55Updated 7 months ago
• The-OpenROAD-Project / alpha-release
  Builds, flow and designs for the alpha release
  ☆54Updated 5 years ago
• lip6 / coriolis
  Coriolis VLSI EDA Tool (LIP6)
  ☆72Updated 2 weeks ago
• IBM / hdl-tools
  Facilitates building open source tools for working with hardware description languages (HDLs)
  ☆65Updated 5 years ago
• SymbiFlow / vtr-verilog-to-routing
  SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research
  ☆38Updated last year
• ucb-cs250 / caravel_fpga250
  FPGA250 aboard the eFabless Caravel
  ☆31Updated 4 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago