Alternatives and similar repositories for ILAng

Users that are interested in ILAng are comparing it to the libraries listed below

• PrincetonUniversity / IMDb-Archive
  ILA Model Database
  ☆24Updated 5 years ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆74Updated 5 years ago
• diffblue / hw-cbmc
  The HW-CBMC and EBMC Model Checkers for Verilog
  ☆99Updated this week
• ymherklotz / verismith
  Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.
  ☆116Updated 7 months ago
• rdaly525 / coreir
  ☆104Updated 3 years ago
• makaimann / ride-core-demo
  A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core
  ☆12Updated 6 years ago
• gipsyh / rIC3
  Hardware Formal Verification Tool
  ☆76Updated this week
• NVlabs / FVEval
  LLM Evaluation Benchmark on Hardware Formal Verification
  ☆34Updated 8 months ago
• tdb-alcorn / chisel-formal
  ☆23Updated 4 years ago
• lana555 / dynamatic
  ☆87Updated last year
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆53Updated 2 years ago
• rsnikhil / Bluespec_BSV_Tutorial
  Bluespec BSV HLHDL tutorial
  ☆111Updated 9 years ago
• PrincetonUniversity / AutoSVA
  AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…
  ☆96Updated last year
• ekiwi / rtl-repair
  Fast Symbolic Repair of Hardware Design Code
  ☆32Updated 11 months ago
• efeslab / hardware-bugbase
  ☆20Updated last year
• RPTU-EIS / upec-boom-verification-suite
  This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks ba…
  ☆21Updated 2 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated 2 years ago
• upscale-project / generic-sqed-demo
  ☆13Updated 4 years ago
• wincle626 / HLS_Legup
  ☆29Updated 8 years ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆54Updated 5 years ago
• Gy-Hu / HWMCC24-benchmark
  Collection for submission (Hardware Model Checking Benchmark)
  ☆11Updated last month
• ekiwi / rtl-fuzz-lab
  A Modular Open-Source Hardware Fuzzing Framework
  ☆36Updated 4 years ago
• CTSRD-CHERI / TestRIG
  Testing processors with Random Instruction Generation
  ☆50Updated last month
• YosysHQ / eqy
  Equivalence checking with Yosys
  ☆53Updated 3 weeks ago
• sterin / super-prove-build
  ☆14Updated 5 years ago
• zslwyuan / Light-HLS
  Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)
  ☆62Updated 3 years ago
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆42Updated 11 months ago
• apl-cornell / PDL
  A Hardware Pipeline Description Language
  ☆49Updated 5 months ago
• rajdeep87 / verilog-c
  ANSI-C benchmarks generated from Verilog RTL circuits with safety assertions. Used for Formal Property Verification.
  ☆17Updated 7 years ago
• hwmcc / btor2tools
  A generic parser and tool package for the BTOR2 format.
  ☆45Updated 3 months ago