My MEng thesis code - verifying a security property for an SoC with Rosette
β17Jun 9, 2021Updated 4 years ago
Alternatives and similar repositories for kronos
Users that are interested in kronos are comparing it to the libraries listed below
Sorting:
- Simple RISC-V processor for FPGAsβ21Apr 18, 2023Updated 2 years ago
- A tool for formally verifying constant-time software against hardware π°οΈβ14Feb 1, 2025Updated last year
- A framework for formally verifying hardware security modules to be free of hardware, software, and timing side-channel vulnerabilities πβ40Nov 29, 2025Updated 3 months ago
- Tools for reasoning about circuits in Rosette/Racket πβ19Feb 1, 2025Updated last year
- RTLCheckβ25Oct 9, 2018Updated 7 years ago
- How to set up OAuth 2.0 from MIT OpenID using Passport.js and selected guides on understanding OAuth 2.0.β12Jan 21, 2018Updated 8 years ago
- β11Jul 1, 2025Updated 8 months ago
- Iodine: Verifying Constant-Time Execution of Hardwareβ15Mar 29, 2021Updated 4 years ago
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submissionβ11Jul 4, 2025Updated 7 months ago
- PipeProofβ11Dec 18, 2019Updated 6 years ago
- β13Jun 22, 2017Updated 8 years ago
- ILP SAT Detailed Routerβ13Apr 14, 2020Updated 5 years ago
- A tool to convert binary files to COE files π«β17Jan 17, 2026Updated last month
- β37Jun 19, 2019Updated 6 years ago
- A Modeling and Verification Platform for SoCs using ILAsβ81Jul 3, 2024Updated last year
- β25Nov 2, 2025Updated 4 months ago
- Papers, Posters, Presentations, Documentation...β19Jan 9, 2024Updated 2 years ago
- β24Aug 9, 2022Updated 3 years ago
- All the tools you need to reproduce the CellIFT paper experimentsβ24Feb 11, 2025Updated last year
- The HW-CBMC and EBMC Model Checkers for Verilogβ102Updated this week
- Hierarchical Asynchronous Circuit Kompiler Toolkitβ24Dec 17, 2025Updated 2 months ago
- Parendi: Thousand-way Parallel RTL Simulation on the Graphcore IPUβ25Nov 26, 2025Updated 3 months ago
- Notary: A Device for Secure Transaction Approval πβ28Feb 1, 2025Updated last year
- Analog Circuit Simulatorβ26Sep 6, 2024Updated last year
- A implementation of the Holte and Talley Mixed layer depth algorithm in Python.β25May 1, 2019Updated 6 years ago
- compiling DSLs to high-level hardware instructionsβ23Nov 8, 2022Updated 3 years ago
- Code repository for Coppelia toolβ23Nov 12, 2020Updated 5 years ago
- Modern dev tools for Tcl β’ includes a linter, formatter, and editor integration.β90Feb 19, 2026Updated last week
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)β24Feb 1, 2020Updated 6 years ago
- design and verification of asynchronous circuitsβ43Updated this week
- Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memoryβ¦β32Oct 18, 2018Updated 7 years ago
- Ghidra P-Code emulation and static LLVM lifting in Pythonβ38Mar 26, 2022Updated 3 years ago
- Binary analysis in HOLβ46Feb 13, 2026Updated 2 weeks ago
- A small Redis-based URL Redirectorβ72Jul 23, 2019Updated 6 years ago
- Easy SMT solver interactionβ34Feb 3, 2026Updated 3 weeks ago
- β43Jun 28, 2025Updated 8 months ago
- β40Feb 11, 2026Updated 2 weeks ago
- RISC-V GPGPUβ36Mar 6, 2020Updated 5 years ago
- Ease the Life of Verification Engineers by helping them to analyze and understand failing simulation fasterβ11Oct 14, 2021Updated 4 years ago